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Searched refs:RVC_RS1S (Results 1 – 2 of 2) sorted by relevance

/linux/arch/riscv/kernel/
A Dtraps_misaligned.c118 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
138 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
/linux/arch/riscv/kvm/
A Dvcpu_exit.c96 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
116 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))

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