Searched refs:Reset (Results 1 – 25 of 336) sorted by relevance
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| /linux/drivers/reset/ |
| A D | Kconfig | 6 bool "Reset Controller Support"
9 Generic Reset Controller support.
39 bool "BCM6345 Reset Controller"
46 tristate "Berlin Reset Driver"
70 bool "Synopsys HSDK Reset Driver"
77 tristate "i.MX7/8 Reset Driver"
86 bool "Intel Reset Controller Driver"
126 tristate "Meson Reset Driver"
150 bool "Pistachio Reset Driver"
156 tristate "Qcom AOSS Reset Driver"
[all …]
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| /linux/Documentation/devicetree/bindings/reset/ |
| A D | amlogic,meson-reset.yaml | 8 title: Amlogic Meson SoC Reset Controller
16 - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs
17 - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs
18 - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs
19 - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs
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| A D | nxp,lpc1850-rgu.txt | 1 NXP LPC1850 Reset Generation Unit (RGU)
18 Reset Peripheral
64 Reset provider example:
73 Reset consumer example:
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| A D | microchip,rst.yaml | 7 title: Microchip Sparx5 Switch Reset Controller
16 - One Time Switch Core Reset (Soft Reset)
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| A D | zynq-reset.txt | 1 Xilinx Zynq Reset Manager
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
24 Reset outputs:
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| A D | ti-syscon-reset.txt | 1 TI SysCon Reset Controller
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
49 SysCon Reset Consumer Nodes
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| A D | renesas,rst.yaml | 7 title: Renesas R-Car and RZ/G Reset Controller
14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
18 - Reset control of peripheral devices (on R-Car Gen1),
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| A D | reset.txt | 1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
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| A D | intel,rcu-gw.yaml | 7 title: System Reset Controller on Intel Gateway SoCs
19 description: Reset controller registers.
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| /linux/Documentation/hwmon/ |
| A D | ltc3815.rst | 44 in1_reset_history Reset input voltage history.
50 in2_reset_history Reset output voltage history.
55 temp1_reset_history Reset temperature history.
60 curr1_reset_history Reset input current history.
66 curr2_reset_history Reset output current history.
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| A D | ltc2978.rst | 281 in1_reset_history Reset input voltage history.
318 in[N]_reset_history Reset output voltage history.
371 temp[N]_reset_history Reset temperature history.
409 curr1_reset_history Reset input current history.
448 curr[N]_reset_history Reset output current history.
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| A D | aspeed-wdt.txt | 16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
26 Reset types:
28 - cpu: Reset CPU on watchdog timeout
30 - soc: Reset 'System on Chip' on watchdog timeout
32 - system: Reset system on watchdog timeout
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| /linux/Documentation/driver-api/ |
| A D | reset.rst | 4 Reset controller API
10 Reset controllers are central units that control the reset signals to multiple
29 Reset line
34 Reset control
44 Reset controller
49 Reset consumer
146 Reset control arrays
155 Reset controller driver interface
178 Reset consumer API
205 Reset controller driver API
[all …]
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| /linux/drivers/reset/hisilicon/ |
| A D | Kconfig | 3 tristate "Hi3660 Reset Driver"
10 tristate "Hi6220 Reset Driver"
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| /linux/Documentation/devicetree/bindings/display/ |
| A D | allwinner,sun4i-a10-tcon.yaml | 84 - description: TCON Reset Line
87 - description: TCON Reset Line
88 - description: TCON LVDS Reset Line
91 - description: TCON Reset Line
92 - description: TCON eDP Reset Line
95 - description: TCON Reset Line
96 - description: TCON eDP Reset Line
97 - description: TCON LVDS Reset Line
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| /linux/init/ |
| A D | initramfs.c | 204 Reset enumerator
340 next_state = Reset; in do_name()
412 next_state = Reset; in do_symlink()
424 [Reset] = do_reset,
453 state = Reset; in flush_buffer()
513 if (state != Reset) in unpack_to_rootfs()
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| /linux/Documentation/driver-api/mmc/ |
| A D | mmc-tools.rst | 26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
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| /linux/Documentation/devicetree/bindings/mfd/ |
| A D | altera-a10sr.txt | 20 a10sr_rst Reset Controller
30 Arria10 Peripheral PHY Reset
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | nvidia,tegra20-car.yaml | 7 title: NVIDIA Tegra Clock and Reset Controller
14 The Clock and Reset (CAR) is the HW module responsible for muxing and gating
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| A D | renesas,cpg-mssr.yaml | 7 title: Renesas Clock Pulse Generator / Module Standby and Software Reset
14 and MSSR (Module Standby and Software Reset) blocks are intimately connected,
22 2. Reset Control, to perform a software reset of individual SoC devices.
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| A D | nvidia,tegra124-car.yaml | 7 title: NVIDIA Tegra Clock and Reset Controller
14 The Clock and Reset (CAR) is the HW module responsible for muxing and gating
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| /linux/Documentation/ABI/testing/ |
| A D | sysfs-bus-papr-pmem | 48 * "CtlResCt" : Controller Reset Count
49 * "CtlResTm" : Controller Reset Elapsed Time
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| A D | sysfs-bus-usb-lvstest | 32 Write to this node to issue "Reset" for Link Layer Validation
58 Write to this node to issue "Warm Reset" for Link Layer Validation
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| /linux/Documentation/devicetree/bindings/power/reset/ |
| A D | keystone-reset.txt | 7 SoC. Each watchdog timer event input is connected to the Reset Mux
8 block. The Reset Mux block can be configured to cause reset or not.
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| /linux/Documentation/devicetree/bindings/dma/ |
| A D | renesas,rz-dmac.yaml | 75 - description: Reset for DMA ARESETN reset terminal
76 - description: Reset for DMA RST_ASYNC reset terminal
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