| /linux/Documentation/misc-devices/ |
| A D | xilinx_sdfec.rst | 4 Xilinx SD-FEC Driver 50 - Activate the SD-FEC core 51 - Monitor the SD-FEC core for errors 61 - Activate the SD-FEC core 112 SD-FEC core is configured plus if the SD-FEC has not been configured for PL 117 - Get the SD-FEC core status 119 - Stop the SD-FEC core 181 Bypass the SD-FEC 190 Start the SD-FEC core 195 Get SD-FEC Status [all …]
|
| /linux/drivers/mmc/host/ |
| A D | Kconfig | 3 # MMC/SD host controller drivers 6 comment "MMC/SD/SDIO Host Controller Drivers" 516 SD/MMC card reader, say Y or M here. 556 SD/MMC/SDIO devices. 618 tristate "MMC/SD/SDIO over SPI" 761 tristate "VIA SD/MMC Card Reader Driver" 767 SD/MMC/SDHC. 932 support MMC or SD memory cards. 1038 tristate "Broadcom SDIO/SD/MMC support" 1066 SD/MMC/SDIO devices. [all …]
|
| /linux/drivers/infiniband/hw/hfi1/ |
| A D | sdma.c | 49 #define SD(name) SEND_DMA_##name macro 317 reg &= SD(DESC_CNT_CNT_MASK); in sdma_set_desc_cnt() 318 reg <<= SD(DESC_CNT_CNT_SHIFT); in sdma_set_desc_cnt() 1935 write_sde_csr(sde, SD(CTRL), in sdma_sendctrl() 1960 write_sde_csr(sde, SD(LEN_GEN), in sdma_setlengen() 1962 write_sde_csr(sde, SD(LEN_GEN), in sdma_setlengen() 2028 write_sde_csr(sde, SD(MEMORY), in init_sdma_regs() 2065 sdma_dumpstate_helper(SD(CTRL)); in sdma_dumpstate() 2078 sdma_dumpstate_helper(SD(TAIL)); in sdma_dumpstate() 3144 SD(CHECK_SLID_MASK_SHIFT)) | in sdma_update_lmc() [all …]
|
| /linux/Documentation/driver-api/mmc/ |
| A D | mmc-dev-attrs.rst | 2 SD and MMC Block Device Attributes 6 SD or MMC device. 14 SD and MMC Device Attributes 22 scr SD Card Configuration Register (SD only) 25 (SD and MMCv1 only) 27 (SD and MMCv1 only) 32 (SD and MMCv4 only) 51 always one 512 byte sector. For SD, "erase_size" is 512 54 SD/MMC cards can erase an arbitrarily large area up to and 72 (especially for SD where it is just one sector), [all …]
|
| A D | mmc-dev-parts.rst | 2 SD and MMC Device Partitions 6 SD/MMC device.
|
| /linux/Documentation/devicetree/bindings/dma/ |
| A D | ste-dma40.txt | 63 1: SD/MMC controller 0 (unused) 64 2: SD/MMC controller 1 (unused) 65 3: SD/MMC controller 2 (unused) 90 28: SD/MM controller 2 91 29: SD/MM controller 0 94 32: SD/MM controller 1 103 41: SD/MM controller 3 104 42: SD/MM controller 4 105 43: SD/MM controller 5
|
| /linux/Documentation/devicetree/bindings/mmc/ |
| A D | sdhci-am654.yaml | 57 description: Output tap delay for SD/MMC legacy timing 69 description: Output tap delay for SD high speed timing 75 description: Output tap delay for SD UHS SDR12 timing 81 description: Output tap delay for SD UHS SDR25 timing 87 description: Output tap delay for SD UHS SDR50 timing 93 description: Output tap delay for SD UHS SDR104 timing 99 description: Output tap delay for SD UHS DDR50 timing 127 description: Input tap delay for SD/MMC legacy timing 139 description: Input tap delay for SD high speed timing 145 description: Input tap delay for SD UHS SDR12 timing [all …]
|
| A D | aspeed,sdhci.yaml | 8 title: ASPEED SD/SDIO/MMC Controller 15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO 39 description: The SD/SDIO controller clock gate 57 description: The SD bus clock 60 description: The SD interrupt shared between both slots
|
| A D | samsung,s3cmci.txt | 1 * Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings 3 Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface 4 with external MMC, SD and SDIO storage mediums. 7 mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
|
| A D | cdns,sdhci.yaml | 7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) 39 description: Value of the delay in the input path for SD high-speed timing 51 description: Value of the delay in the input path for SD UHS SDR12 timing 57 description: Value of the delay in the input path for SD UHS SDR25 timing 63 description: Value of the delay in the input path for SD UHS SDR50 timing 69 description: Value of the delay in the input path for SD UHS DDR50 timing
|
| A D | sdhci-sprd.txt | 3 The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface 4 for MMC, SD and SDIO types of cards. 34 - sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing. 35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. 36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
|
| A D | mmc-controller.yaml | 52 # *NOTE* on CD and WP polarity. To use common for all SD/MMC host 126 SD high-speed timing is supported. 136 SD UHS SDR12 speed is supported. 141 SD UHS SDR25 speed is supported. 146 SD UHS SDR50 speed is supported. 151 SD UHS SDR104 speed is supported. 156 SD UHS DDR50 speed is supported. 245 Controller is limited to send SD commands during initialization. 307 sequence. To successfully detect an (e)MMC/SD/SDIO card, that 333 subnode describes. A value of 0 denotes the memory SD
|
| A D | marvell,xenon-sdhci.txt | 53 All those types of PHYs can support eMMC, SD and SDIO. 85 always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25, 86 SD Default Speed and HS mode and eMMC legacy speed mode. 124 - For SD/SDIO: 159 - For SD/SDIO with compatible "marvell,armada-3700-sdhci":
|
| A D | amlogic,meson-gx.txt | 1 Amlogic SD / eMMC controller for S905/GXBB family SoCs 4 interface for SD, eMMC and SDIO devices.
|
| A D | cavium-mmc.txt | 4 for MMC and SD types of memory cards. 7 as the speed of SD standard 4.0. Only 3.3 Volt is supported.
|
| A D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller 49 supply in eMMC/SD specs. 75 /* Example SD stih407 family configuration */
|
| /linux/Documentation/devicetree/bindings/clock/ |
| A D | idt,versaclock5.yaml | 38 SH SP Output when the SD/OE pin is Low/High 86 shut down if the SD/OE pin is driven high. If 0, this disables the 88 the value of the SD/OE pin. This property corresponds to the SH 95 If 1, this enables output when the SD/OE pin is high, and disables 96 output when the SD/OE pin is low. If 0, this disables output when 97 the SD/OE pin is high, and enables output when the SD/OE pin is 178 /* Set the SD/OE pin's settings */
|
| /linux/drivers/gpu/drm/sti/ |
| A D | NOTES | 14 - The HDMI / DVO / HD Analog / SD analog IP builds the video signals 18 - The SD analog signal is typically used for legacy TV 29 dec | | | mixer| | +---+ SD analog +--> CVBS 45 - The Bridges/Connectors are mapped to the HDMI / DVO / HD Analog / SD analog 57 | | | mixer| | +-> | | SD analog | <-+
|
| /linux/drivers/clk/qcom/ |
| A D | Kconfig | 107 i2c, USB, SD/eMMC, SATA, PCIe, etc. 142 i2c, USB, SD/eMMC, etc. 157 i2c, USB, SD/eMMC, etc. 180 i2c, USB, SD/eMMC, etc. 218 I2C, USB, SD/eMMC, etc. 225 i2c, USB, SD/eMMC, etc. 558 SPI, I2C, USB, SD/UFS, PCIe etc. 588 SPI, I2C, USB, SD/UFS, PCIe etc. 596 SPI, I2C, USB, SD/UFS, PCIe etc. 603 SPI, I2C, USB, SD/UFS, PCIe etc. [all …]
|
| /linux/Documentation/devicetree/bindings/media/i2c/ |
| A D | adv7343.txt | 6 definition (SD), enhanced definition (ED), or high definition (HD) video 22 - ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF 42 /* Use SD DAC output 1 */
|
| /linux/arch/arm/boot/dts/ |
| A D | kirkwood-openrd.dtsi | 79 * (serial@12100) and SD (mvsdio@90000). 82 * High: SD 88 output-high; /* Select SD by default */
|
| A D | imx6qdl-dhcom-drc02.dtsi | 13 * Special SoM hardware required which uses the pins from micro SD card. The 15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD 98 &usdhc2 { /* SD card */ 104 * Due to the use of can2 the micro SD card on module have to be
|
| /linux/drivers/mmc/ |
| A D | Kconfig | 7 tristate "MMC/SD/SDIO card support" 13 If you want MMC/SD/SDIO support, you should say Y here and
|
| /linux/arch/arm64/boot/dts/nvidia/ |
| A D | tegra194-p3668-0000.dtsi | 5 model = "NVIDIA Jetson Xavier NX (SD-card)"; 13 /* SDMMC1 (SD/MMC) */
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| A D | vqmmc-ipq4019-regulator.yaml | 7 title: Qualcomm IPQ4019 VQMMC SD LDO regulator 13 Qualcomm IPQ4019 SoC-s feature a built a build SD/EMMC controller,
|