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Searched refs:TEGRA20_CLK_PLL_P_OUT3 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A Dtegra20-car.h147 #define TEGRA20_CLK_PLL_P_OUT3 124 macro
/linux/arch/arm/boot/dts/
A Dtegra20.dtsi503 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
533 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
549 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
565 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
A Dtegra20-paz00.dts310 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
/linux/drivers/clk/tegra/
A Dclk-tegra20.c423 { .con_id = "pll_p_out3", .dt_id = TEGRA20_CLK_PLL_P_OUT3 },
545 [tegra_clk_pll_p_out3] = { .dt_id = TEGRA20_CLK_PLL_P_OUT3, .present = true },
1021 { TEGRA20_CLK_PLL_P_OUT3, TEGRA20_CLK_CLK_MAX, 72000000, 1 },

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