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Searched refs:TEGRA210_CLK_PLL_A_OUT0 (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
A Dnvidia,tegra-audio-graph-card.yaml66 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
70 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
72 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
92 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
162 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
A Dnvidia,tegra210-ahub.yaml131 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
168 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
179 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
A Dnvidia,tegra210-dmic.yaml93 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
A Dnvidia,tegra210-i2s.yaml109 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
/linux/arch/arm64/boot/dts/nvidia/
A Dtegra210.dtsi1426 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1550 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1563 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1576 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1589 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1602 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1614 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1626 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1638 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
1973 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
[all …]
/linux/include/dt-bindings/clock/
A Dtegra210-car.h280 #define TEGRA210_CLK_PLL_A_OUT0 249 macro
/linux/drivers/clk/tegra/
A Dclk-tegra210.c2462 [tegra_clk_pll_a_out0] = { .dt_id = TEGRA210_CLK_PLL_A_OUT0, .present = true },
2591 { .con_id = "pll_a_out0", .dt_id = TEGRA210_CLK_PLL_A_OUT0 },
3553 { TEGRA210_CLK_PLL_A_OUT0, TEGRA210_CLK_CLK_MAX, 11289600, 0 },
3554 { TEGRA210_CLK_I2S0, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 },
3555 { TEGRA210_CLK_I2S1, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 },
3556 { TEGRA210_CLK_I2S2, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 },
3557 { TEGRA210_CLK_I2S3, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 },
3558 { TEGRA210_CLK_I2S4, TEGRA210_CLK_PLL_A_OUT0, 11289600, 0 },

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