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Searched refs:TIME_STAMP_INT_ENABLE (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dcik.c7071 cp_m1p0 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7074 cp_m1p1 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7077 cp_m1p2 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7080 cp_m1p2 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7089 cp_m2p0 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7092 cp_m2p1 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7095 cp_m2p2 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7098 cp_m2p2 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7114 cp_m1p0 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
7117 cp_m1p1 |= TIME_STAMP_INT_ENABLE; in cik_irq_set()
[all …]
A Dcikd.h1337 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
1369 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Dnid.h497 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Devergreen.c4526 cp_int_cntl |= TIME_STAMP_INT_ENABLE; in evergreen_irq_set()
4530 cp_int_cntl1 |= TIME_STAMP_INT_ENABLE; in evergreen_irq_set()
4534 cp_int_cntl2 |= TIME_STAMP_INT_ENABLE; in evergreen_irq_set()
4540 cp_int_cntl |= TIME_STAMP_INT_ENABLE; in evergreen_irq_set()
A Dsid.h1282 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Devergreend.h1250 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Dsi.c6078 cp_int_cntl |= TIME_STAMP_INT_ENABLE; in si_irq_set()
6082 cp_int_cntl1 |= TIME_STAMP_INT_ENABLE; in si_irq_set()
6086 cp_int_cntl2 |= TIME_STAMP_INT_ENABLE; in si_irq_set()
A Dr600d.h718 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Dr600.c3822 cp_int_cntl |= TIME_STAMP_INT_ENABLE; in r600_irq_set()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsid.h1310 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
A Dgfx_v9_0.c5754 TIME_STAMP_INT_ENABLE, in gfx_v9_0_set_gfx_eop_interrupt_state()
5801 TIME_STAMP_INT_ENABLE, 0); in gfx_v9_0_set_compute_eop_interrupt_state()
5807 TIME_STAMP_INT_ENABLE, 1); in gfx_v9_0_set_compute_eop_interrupt_state()
A Dgfx_v10_0.c9027 TIME_STAMP_INT_ENABLE, 0); in gfx_v10_0_set_gfx_eop_interrupt_state()
9033 TIME_STAMP_INT_ENABLE, 1); in gfx_v10_0_set_gfx_eop_interrupt_state()
9080 TIME_STAMP_INT_ENABLE, 0); in gfx_v10_0_set_compute_eop_interrupt_state()
9086 TIME_STAMP_INT_ENABLE, 1); in gfx_v10_0_set_compute_eop_interrupt_state()
A Dgfx_v8_0.c6454 WREG32_FIELD(CP_INT_CNTL_RING0, TIME_STAMP_INT_ENABLE, in gfx_v8_0_set_gfx_eop_interrupt_state()

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