Searched refs:WREG8 (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/mgag200/ |
| A D | mgag200_drv.h | 47 WREG8(MGA_MISC_OUT, v)
65 WREG8(ATTR_INDEX, reg); \
66 WREG8(ATTR_DATA, v); \
71 WREG8(MGAREG_SEQ_INDEX, reg); \
77 WREG8(MGAREG_SEQ_INDEX, reg); \
78 WREG8(MGAREG_SEQ_DATA, v); \
90 WREG8(MGAREG_CRTC_DATA, v); \
110 WREG8(GFX_INDEX, reg); \
111 WREG8(GFX_DATA, v); \
119 WREG8(DAC_INDEX, reg); \
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| A D | mgag200_pll.c | 379 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200wb()
384 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200wb()
394 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200wb()
402 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200wb()
426 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200wb()
541 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200ev()
554 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200ev()
565 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200ev()
573 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200ev()
586 WREG8(DAC_DATA, tmp); in mgag200_pixpll_update_g200ev()
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| A D | mgag200_mode.c | 55 WREG8(DAC_INDEX + MGA1064_INDEX, 0); in mga_crtc_load_lut()
121 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL); in mgag200_g200wb_hold_bmc()
135 WREG8(DAC_INDEX, MGA1064_SPAREREG); in mgag200_g200wb_hold_bmc()
145 WREG8(DAC_INDEX, MGA1064_SPAREREG); in mgag200_g200wb_hold_bmc()
171 WREG8(MGAREG_CRTCEXT_INDEX, 1); in mgag200_g200wb_release_bmc()
179 WREG8(DAC_DATA, tmp); in mgag200_g200wb_release_bmc()
187 WREG8(DAC_DATA, tmp); in mgag200_g200wb_release_bmc()
190 WREG8(DAC_INDEX, MGA1064_SPAREREG); in mgag200_g200wb_release_bmc()
193 WREG8(DAC_DATA, tmp); in mgag200_g200wb_release_bmc()
350 WREG8(MGA_MISC_OUT, misc); in mgag200_init_regs()
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| A D | mgag200_i2c.c | 38 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); in mga_i2c_read_gpio()
46 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL); in mga_i2c_set_gpio()
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| A D | mgag200_mm.c | 90 WREG8(MGA_MISC_OUT, misc); in mgag200_mm_init()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | mxgpu_ai.c | 37 WREG8(AI_MAIBOX_CONTROL_RCV_OFFSET_BYTE, 2); in xgpu_ai_mailbox_send_ack()
42 WREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE, val ? 1 : 0); in xgpu_ai_mailbox_set_valid()
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| A D | mxgpu_nv.c | 36 WREG8(NV_MAIBOX_CONTROL_RCV_OFFSET_BYTE, 2); in xgpu_nv_mailbox_send_ack()
41 WREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE, val ? 1 : 0); in xgpu_nv_mailbox_set_valid()
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| A D | amdgpu.h | 1179 #define WREG8(reg, v) amdgpu_mm_wreg8(adev, (reg), (v)) macro
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| /linux/drivers/gpu/drm/radeon/ |
| A D | radeon_legacy_tv.c | 289 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL); in radeon_wait_pll_lock()
291 WREG8(RADEON_CLOCK_CNTL_DATA + 3, 0); in radeon_wait_pll_lock()
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| A D | r100.c | 2892 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); in r100_pll_rreg()
2905 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); in r100_pll_wreg()
3786 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & save->GENMO_WT); in r100_mc_stop()
3817 WREG8(R_0003C2_GENMO_WT, save->GENMO_WT); in r100_mc_resume()
3830 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & tmp); in r100_vga_render_disable()
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| A D | radeon_display.c | 72 WREG8(AVIVO_DC_LUT_RW_INDEX, 0); in avivo_crtc_load_lut()
209 WREG8(RADEON_PALETTE_INDEX, 0); in legacy_crtc_load_lut()
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| A D | radeon.h | 2542 #define WREG8(reg, v) writeb(v, (rdev->rmmio) + (reg)) macro
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