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Searched refs:_en_mask (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt8195-apmixedsys.c30 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
39 .en_mask = _en_mask, \
A Dclk-mt7629.c24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
31 .en_mask = _en_mask, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
A Dclk-mt6797.c609 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
616 .en_mask = _en_mask, \
629 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
632 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
A Dclk-mt7622.c24 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
31 .en_mask = _en_mask, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
A Dclk-mt8516.c736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
743 .en_mask = _en_mask, \
756 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
759 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
A Dclk-mt6779.c1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1154 .en_mask = _en_mask, \
1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1177 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
A Dclk-mt8167.c982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
989 .en_mask = _en_mask, \
1002 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1005 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
A Dclk-mt2712.c1166 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1174 .en_mask = _en_mask, \
1189 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1192 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
A Dclk-mt6765.c716 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
723 .en_mask = _en_mask, \
740 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
744 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
A Dclk-mt8173.c938 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
945 .en_mask = _en_mask, \
958 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
961 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
A Dclk-mt8183.c1067 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1076 .en_mask = _en_mask, \
1094 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1099 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
A Dclk-mt8192.c1120 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1129 .en_mask = _en_mask, \
1148 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1152 PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
A Dclk-mt8135.c596 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
601 .en_mask = _en_mask, \
A Dclk-mt2701.c918 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
924 .en_mask = _en_mask, \

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