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Searched refs:aud_1_parents (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/mediatek/
A Dclk-mt6797.c272 static const char * const aud_1_parents[] = { variable
365 MUX_GATE(CLK_TOP_MUX_AUD_1, "aud_1_sel", aud_1_parents,
A Dclk-mt6779.c542 static const char * const aud_1_parents[] = { variable
757 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1, "aud_1_sel", aud_1_parents,
A Dclk-mt2712.c475 static const char * const aud_1_parents[] = { variable
797 aud_1_parents, 0x0a0, 24, 2, 31),
A Dclk-mt6765.c274 static const char * const aud_1_parents[] = { variable
422 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents,
A Dclk-mt8173.c405 static const char * const aud_1_parents[] __initconst = { variable
579 MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24, 2, 31),
A Dclk-mt8183.c508 static const char * const aud_1_parents[] = { variable
653 aud_1_parents, 0xe0,
A Dclk-mt8192.c538 static const char * const aud_1_parents[] = { variable
818 aud_1_parents, 0x0e0, 0x0e4, 0x0e8, 0, 1, 7, 0x008, 21),
/linux/
A DSystem.map73852 ffff8000110d87b8 d aud_1_parents
73895 ffff8000110dc8b0 d aud_1_parents
73957 ffff8000110dfc50 d aud_1_parents
74041 ffff8000110e3018 d aud_1_parents
74175 ffff8000110eb070 d aud_1_parents
74295 ffff8000110f21f0 d aud_1_parents
126452 ffff800011879098 d aud_1_parents
A D.tmp_System.map73852 ffff8000110d87b8 d aud_1_parents
73895 ffff8000110dc8b0 d aud_1_parents
73957 ffff8000110dfc50 d aud_1_parents
74041 ffff8000110e3018 d aud_1_parents
74175 ffff8000110eb070 d aud_1_parents
74295 ffff8000110f21f0 d aud_1_parents
126452 ffff800011879098 d aud_1_parents

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