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Searched refs:cacheline_size (Results 1 – 13 of 13) sorted by relevance

/linux/tools/perf/util/
A Dcacheline.h7 int __pure cacheline_size(void);
12 return (address & ~(cacheline_size() - 1)); in cl_address()
18 return (address & (cacheline_size() - 1)); in cl_offset()
A Dcacheline.c17 int cacheline_size(void) in cacheline_size() function
A Dsort.c2854 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add()
2900 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
/linux/drivers/gpu/drm/amd/amdkfd/
A Dkfd_topology.h130 uint32_t cacheline_size; member
A Dkfd_topology.c355 cache->cacheline_size); in kfd_cache_show()
A Dkfd_crat.c973 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
/linux/drivers/scsi/
A Dmyrb.h297 unsigned short cacheline_size; /* Bytes 104-105 */ member
A Dmyrs.h413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
A Dmyrs.c1577 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1579 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
/linux/drivers/gpu/drm/i915/
A Dintel_pm.c594 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
602 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
610 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
618 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
626 .cacheline_size = I915_FIFO_LINE_SIZE,
634 .cacheline_size = I915_FIFO_LINE_SIZE,
642 .cacheline_size = I915_FIFO_LINE_SIZE,
650 .cacheline_size = I830_FIFO_LINE_SIZE,
658 .cacheline_size = I830_FIFO_LINE_SIZE,
666 .cacheline_size = I830_FIFO_LINE_SIZE,
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/linux/drivers/pci/
A Dpci.c4434 u8 cacheline_size; in pci_set_cacheline_size() local
4441 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4442 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4443 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4449 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4450 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
/linux/drivers/gpu/drm/i915/display/
A Dintel_display_types.h1388 u8 cacheline_size; member
/linux/drivers/net/ethernet/broadcom/
A Dtg3.c16991 int cacheline_size; in tg3_calc_dma_bndry() local
16997 cacheline_size = 1024; in tg3_calc_dma_bndry()
16999 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17039 switch (cacheline_size) { in tg3_calc_dma_bndry()
17064 switch (cacheline_size) { in tg3_calc_dma_bndry()
17081 switch (cacheline_size) { in tg3_calc_dma_bndry()

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