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Searched refs:ccu (Results 1 – 25 of 119) sorted by relevance

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/linux/drivers/clk/bcm/
A Dclk-kona.c163 ccu->name); in __ccu_write_enable()
174 ccu->name); in __ccu_write_disable()
233 __func__, ccu->name); in __ccu_policy_engine_start()
263 __func__, ccu->name); in __ccu_policy_engine_start()
285 __func__, ccu->name); in __ccu_policy_engine_stop()
296 __func__, ccu->name); in __ccu_policy_engine_stop()
384 flags = ccu_lock(ccu); in is_clk_gate_enabled()
501 flags = ccu_lock(ccu); in clk_gate()
573 flags = ccu_lock(ccu); in divider_read_scaled()
1196 struct ccu_data *ccu = bcm_clk->ccu; in __peri_clk_init() local
[all …]
A Dclk-kona-setup.c757 if (!ccu->base) in kona_ccu_teardown()
761 ccu_clks_teardown(ccu); in kona_ccu_teardown()
762 of_node_put(ccu->node); in kona_ccu_teardown()
763 ccu->node = NULL; in kona_ccu_teardown()
764 iounmap(ccu->base); in kona_ccu_teardown()
765 ccu->base = NULL; in kona_ccu_teardown()
823 ccu->range = (u32)range; in kona_dt_ccu_setup()
830 ccu->base = ioremap(res.start, ccu->range); in kona_dt_ccu_setup()
831 if (!ccu->base) { in kona_dt_ccu_setup()
844 if (!ccu->kona_clks[i].ccu) in kona_dt_ccu_setup()
[all …]
/linux/Documentation/devicetree/bindings/clock/
A Dallwinner,sun4i-a10-ccu.yaml22 - allwinner,sun4i-a10-ccu
23 - allwinner,sun5i-a10s-ccu
24 - allwinner,sun5i-a13-ccu
25 - allwinner,sun6i-a31-ccu
26 - allwinner,sun7i-a20-ccu
27 - allwinner,sun8i-a23-ccu
28 - allwinner,sun8i-a33-ccu
31 - allwinner,sun8i-h3-ccu
34 - allwinner,sun8i-v3-ccu
47 - nextthing,gr8-ccu
[all …]
/linux/arch/arm/boot/dts/
A Dsun6i-a31.dtsi69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
471 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
968 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1070 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
A Dsunxi-h3-h5.dtsi66 <&ccu CLK_TCON0>, <&ccu CLK_HDMI>;
164 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
302 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
303 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
584 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
600 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
624 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
645 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
658 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
671 clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
[all …]
A Dsun8i-r40.dtsi260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
398 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
719 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
732 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
A Dsun4i-a10.dtsi68 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
69 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>;
78 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
79 <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
80 <&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>,
90 <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_BE0>,
91 <&ccu CLK_DE_FE0>, <&ccu CLK_TCON0_CH0>,
102 <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
103 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_TVE0>,
434 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
[all …]
A Dsun7i-a20.dtsi71 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
72 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
82 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
93 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
94 <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
339 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
352 clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
382 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
410 resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
510 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
[all …]
A Dsun5i.dtsi75 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
85 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
86 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
207 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
220 clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
234 clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
322 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
416 clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
[all …]
A Dsun8i-a83t.dtsi457 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
461 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
494 clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
609 clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
681 clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>;
870 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
885 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
898 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
913 clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
1072 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
[all …]
A Dsun8i-a23-a33.dtsi64 clocks = <&ccu CLK_BUS_LCD>, <&ccu CLK_BUS_DE_BE>,
65 <&ccu CLK_LCD_CH0>, <&ccu CLK_DE_BE>,
66 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_DRC>;
168 clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
188 <&ccu 13>;
222 <&ccu CLK_MMC0>,
323 clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>;
604 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
628 clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
652 clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
[all …]
A Dsun8i-v3s.dtsi64 <&ccu CLK_TCON0>;
77 clocks = <&ccu CLK_CPU>;
127 <&ccu CLK_DE>;
190 <&ccu CLK_TCON0>;
224 <&ccu CLK_MMC0>,
245 <&ccu CLK_MMC1>,
266 <&ccu CLK_MMC2>,
286 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
321 ccu: clock@1c20000 { label
458 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
[all …]
A Dsun8i-h3.dtsi78 clocks = <&ccu CLK_CPUX>;
191 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
192 <&ccu CLK_DRAM_VE>;
203 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
225 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
236 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
277 &ccu {
288 <&ccu CLK_MMC0>,
289 <&ccu CLK_MMC0_OUTPUT>,
300 <&ccu CLK_MMC1>,
[all …]
A Dsun8i-a33.dtsi209 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
210 <&ccu CLK_DRAM_VE>;
221 clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
232 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
245 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
262 <&ccu CLK_DSI_SCLK>;
282 <&ccu CLK_DSI_DPHY>;
369 clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
370 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
373 resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
[all …]
A Dsun9i-a80.dtsi227 <&ccu CLK_PLL_AUDIO>;
465 clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
584 clocks = <&ccu CLK_DE>,
585 <&ccu CLK_SDRAM>,
586 <&ccu CLK_BUS_DE>;
879 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
882 <&ccu RST_BUS_EDP>,
883 <&ccu RST_BUS_LVDS>;
912 clocks = <&ccu CLK_BUS_LCD1>, <&ccu CLK_LCD1>;
914 resets = <&ccu RST_BUS_LCD1>, <&ccu RST_BUS_EDP>;
[all …]
/linux/drivers/clk/sunxi-ng/
A DMakefile25 obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
28 obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o
31 obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o
32 obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o
33 obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o
34 obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o
35 obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o
37 obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o
38 obj-$(CONFIG_SUN8I_V3S_CCU) += ccu-sun8i-v3s.o
39 obj-$(CONFIG_SUN8I_DE2_CCU) += ccu-sun8i-de2.o
[all …]
A Dccu_reset.c16 struct ccu_reset *ccu = rcdev_to_ccu_reset(rcdev); in ccu_reset_assert() local
21 spin_lock_irqsave(ccu->lock, flags); in ccu_reset_assert()
23 reg = readl(ccu->base + map->reg); in ccu_reset_assert()
24 writel(reg & ~map->bit, ccu->base + map->reg); in ccu_reset_assert()
26 spin_unlock_irqrestore(ccu->lock, flags); in ccu_reset_assert()
34 struct ccu_reset *ccu = rcdev_to_ccu_reset(rcdev); in ccu_reset_deassert() local
39 spin_lock_irqsave(ccu->lock, flags); in ccu_reset_deassert()
41 reg = readl(ccu->base + map->reg); in ccu_reset_deassert()
42 writel(reg | map->bit, ccu->base + map->reg); in ccu_reset_deassert()
44 spin_unlock_irqrestore(ccu->lock, flags); in ccu_reset_deassert()
[all …]
A Dccu_common.c94 ccu->desc = desc; in sunxi_ccu_probe()
131 reset = &ccu->reset; in sunxi_ccu_probe()
180 struct sunxi_ccu *ccu; in devm_sunxi_ccu_probe() local
183 ccu = devres_alloc(devm_sunxi_ccu_release, sizeof(*ccu), GFP_KERNEL); in devm_sunxi_ccu_probe()
184 if (!ccu) in devm_sunxi_ccu_probe()
189 devres_free(ccu); in devm_sunxi_ccu_probe()
193 devres_add(dev, ccu); in devm_sunxi_ccu_probe()
201 struct sunxi_ccu *ccu; in of_sunxi_ccu_probe() local
204 ccu = kzalloc(sizeof(*ccu), GFP_KERNEL); in of_sunxi_ccu_probe()
205 if (!ccu) in of_sunxi_ccu_probe()
[all …]
A Dbuilt-in.a18 ccu-sun50i-a64.o/
19 ccu-sun50i-a100.o/
20 ccu-sun50i-a100-r.o/
21 ccu-sun50i-h6.o/
22 ccu-sun50i-h616.o/
23 ccu-sun50i-h6-r.o/
24 ccu-sun8i-h3.o/
25 ccu-sun8i-de2.o/
26 ccu-sun8i-r.o/
/linux/arch/arm64/boot/dts/allwinner/
A Dsun50i-h6.dtsi159 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
176 clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
186 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>;
442 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
459 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
476 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
580 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
595 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
630 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
777 <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
[all …]
A Dsun50i-a64.dtsi39 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
407 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
494 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
505 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
519 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
533 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
559 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
883 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
897 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
946 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
[all …]
A Dsun50i-h5.dtsi18 clocks = <&ccu CLK_CPUX>;
28 clocks = <&ccu CLK_CPUX>;
107 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
108 <&ccu CLK_DRAM_VE>;
119 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
168 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
181 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
228 &ccu {
239 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
246 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
[all …]
A Dsun50i-a100.dtsi95 ccu: clock@3001000 { label
209 clocks = <&ccu CLK_BUS_I2C0>;
210 resets = <&ccu RST_BUS_I2C0>;
221 clocks = <&ccu CLK_BUS_I2C1>;
222 resets = <&ccu RST_BUS_I2C1>;
233 clocks = <&ccu CLK_BUS_I2C2>;
234 resets = <&ccu RST_BUS_I2C2>;
245 clocks = <&ccu CLK_BUS_I2C3>;
256 clocks = <&ccu CLK_BUS_THS>;
258 resets = <&ccu RST_BUS_THS>;
[all …]
/linux/Documentation/devicetree/bindings/display/
A Dallwinner,sun4i-a10-tcon.yaml378 resets = <&ccu RST_TCON0>;
380 clocks = <&ccu CLK_AHB_LCD0>,
381 <&ccu CLK_TCON0_CH0>,
451 resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
454 <&ccu CLK_LCD0_CH0>,
455 <&ccu CLK_LCD0_CH1>,
456 <&ccu CLK_PLL_MIPI>;
525 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
527 resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
575 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
[all …]
A Dallwinner,sun8i-a83t-dw-hdmi.yaml153 * This comes from the clock/sun8i-a83t-ccu.h and
154 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
168 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
169 <&ccu CLK_HDMI>;
171 resets = <&ccu RST_BUS_HDMI1>;
205 * This comes from the clock/sun50i-h6-ccu.h and
206 * reset/sun50i-h6-ccu.h headers, but we can't include them since
224 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
225 <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
226 <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
[all …]

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