Searched refs:cdiv (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/clk/qcom/ |
| A D | gcc-ipq4019.c | 1284 mask = (BIT(pll->cdiv.width) - 1) << pll->cdiv.shift; in clk_cpu_div_set_rate()
1311 regmap_read(pll->cdiv.clkr.regmap, pll->cdiv.reg, &cdiv); in clk_cpu_div_recalc_rate()
1312 cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1); in clk_cpu_div_recalc_rate()
1319 if (cdiv > 10) in clk_cpu_div_recalc_rate()
1358 .cdiv.clkr = {
1391 regmap_read(pll->cdiv.clkr.regmap, pll->cdiv.reg, &cdiv); in clk_regmap_clk_div_recalc_rate()
1392 cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1); in clk_regmap_clk_div_recalc_rate()
1412 .cdiv.clkr = {
1427 .cdiv.clkr = {
1442 .cdiv.clkr = {
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| /linux/drivers/gpu/drm/mcde/ |
| A D | mcde_clk_div.c | 18 struct mcde_clk_div *cdiv = container_of(hw, struct mcde_clk_div, hw); in mcde_clk_div_enable() local
19 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_enable()
23 val = readl(mcde->regs + cdiv->cr); in mcde_clk_div_enable()
35 val |= cdiv->cr_div; in mcde_clk_div_enable()
37 writel(val, mcde->regs + cdiv->cr); in mcde_clk_div_enable()
84 struct mcde_clk_div *cdiv = container_of(hw, struct mcde_clk_div, hw); in mcde_clk_div_recalc_rate() local
85 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_recalc_rate()
97 cr = readl(mcde->regs + cdiv->cr); in mcde_clk_div_recalc_rate()
111 struct mcde_clk_div *cdiv = container_of(hw, struct mcde_clk_div, hw); in mcde_clk_div_set_rate() local
126 cdiv->cr_div = cr; in mcde_clk_div_set_rate()
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| /linux/drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 361 unsigned int val, cdiv; in sam9x60_div_pll_set() local
367 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set()
370 if (!!(val & core->layout->endiv_mask) && cdiv == div->div) in sam9x60_div_pll_set()
505 unsigned int val, cdiv; in sam9x60_div_pll_set_rate_chg() local
513 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set_rate_chg()
516 if (cdiv == div->div) in sam9x60_div_pll_set_rate_chg()
553 u32 val, cdiv; in sam9x60_div_pll_notifier_fn() local
569 cdiv = (val & core.layout->div_mask) >> core.layout->div_shift; in sam9x60_div_pll_notifier_fn()
572 if (cdiv == div->safe_div) in sam9x60_div_pll_notifier_fn()
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| /linux/drivers/spi/ |
| A D | spi-bcm2835.c | 1050 unsigned long spi_hz, cdiv; in bcm2835_spi_transfer_one() local
1058 cdiv = 2; /* clk_hz/2 is the fastest we can go */ in bcm2835_spi_transfer_one()
1061 cdiv = DIV_ROUND_UP(bs->clk_hz, spi_hz); in bcm2835_spi_transfer_one()
1062 cdiv += (cdiv % 2); in bcm2835_spi_transfer_one()
1064 if (cdiv >= 65536) in bcm2835_spi_transfer_one()
1065 cdiv = 0; /* 0 is the slowest we can go */ in bcm2835_spi_transfer_one()
1067 cdiv = 0; /* 0 is the slowest we can go */ in bcm2835_spi_transfer_one()
1069 tfr->effective_speed_hz = cdiv ? (bs->clk_hz / cdiv) : (bs->clk_hz / 65536); in bcm2835_spi_transfer_one()
1070 bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv); in bcm2835_spi_transfer_one()
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| A D | spi-ingenic.c | 100 u32 cdiv, speed_hz = xfer->speed_hz ?: spi->max_speed_hz, in spi_ingenic_prepare_transfer() local
103 cdiv = clk_hz / (speed_hz * 2); in spi_ingenic_prepare_transfer()
104 cdiv = clamp(cdiv, 1u, 0x100u) - 1; in spi_ingenic_prepare_transfer()
106 regmap_write(priv->map, REG_SSIGR, cdiv); in spi_ingenic_prepare_transfer()
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| /linux/drivers/i2c/busses/ |
| A D | i2c-at91-master.c | 69 int ckdiv, cdiv, div, hold = 0, filter_width = 0; in at91_calc_twi_clock() local
80 cdiv = div >> ckdiv; in at91_calc_twi_clock()
86 cdiv = 255; in at91_calc_twi_clock()
123 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv in at91_calc_twi_clock()
129 cdiv, ckdiv, hold, t->sda_hold_ns, filter_width, in at91_calc_twi_clock()
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| /linux/drivers/mmc/host/ |
| A D | bcm2835.c | 165 u32 cdiv; member
268 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_reset_internal()
1130 host->cdiv = SDCDIV_MAX_CDIV; in bcm2835_set_clock()
1131 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()
1153 host->cdiv = div; in bcm2835_set_clock()
1154 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()
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