| /linux/drivers/gpu/drm/mediatek/ |
| A D | mtk_hdmi_ddc.c | 65 writel(readl(ddc->regs + offset) | val, ddc->regs + offset); in sif_set_bit() 71 writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset); in sif_clr_bit() 216 if (!ddc) { in mtk_hdmi_ddc_xfer() 270 struct mtk_hdmi_ddc *ddc; in mtk_hdmi_ddc_probe() local 275 if (!ddc) in mtk_hdmi_ddc_probe() 279 if (IS_ERR(ddc->clk)) { in mtk_hdmi_ddc_probe() 281 return PTR_ERR(ddc->clk); in mtk_hdmi_ddc_probe() 286 if (IS_ERR(ddc->regs)) in mtk_hdmi_ddc_probe() 295 strlcpy(ddc->adap.name, "mediatek-hdmi-ddc", sizeof(ddc->adap.name)); in mtk_hdmi_ddc_probe() 299 ddc->adap.retries = 3; in mtk_hdmi_ddc_probe() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | gpio_service.c | 476 struct ddc *ddc; in dal_gpio_create_ddc() local 481 ddc = kzalloc(sizeof(struct ddc), GFP_KERNEL); in dal_gpio_create_ddc() 483 if (!ddc) { in dal_gpio_create_ddc() 508 return ddc; in dal_gpio_create_ddc() 520 struct ddc **ddc) in dal_gpio_destroy_ddc() argument 522 if (!ddc || !*ddc) { in dal_gpio_destroy_ddc() 536 struct ddc *ddc, in dal_ddc_open() argument 595 struct ddc *ddc, in dal_ddc_change_mode() argument 627 const struct ddc *ddc) in dal_ddc_get_line() argument 633 struct ddc *ddc, in dal_ddc_set_config() argument [all …]
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| A D | hw_ddc.c | 42 ddc->shifts->field_name, ddc->masks->field_name 45 ddc->base.base.ctx 47 (ddc->regs->reg) 73 struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr); in set_config() local 80 hw_gpio = &ddc->base; in set_config() 92 switch (config_data->config.ddc.type) { in set_config() 152 if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) { in set_config() 156 if (ddc->regs->phy_aux_cntl != 0) { in set_config() 166 if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) { in set_config() 219 struct hw_ddc *ddc, in dal_hw_ddc_construct() argument [all …]
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| A D | gpio_base.c | 71 if (!gpio->hw_container.ddc) { in dal_gpio_open_ex() 240 return gpio->hw_container.ddc; in dal_gpio_get_ddc() 292 gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); in dal_gpio_create() 295 gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); in dal_gpio_create() 326 kfree((*gpio)->hw_container.ddc); in dal_gpio_destroy() 327 (*gpio)->hw_container.ddc = NULL; in dal_gpio_destroy() 331 kfree((*gpio)->hw_container.ddc); in dal_gpio_destroy() 332 (*gpio)->hw_container.ddc = NULL; in dal_gpio_destroy()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_ddc.c | 253 if (!ddc || !*ddc) { in dal_ddc_service_destroy() 258 kfree(*ddc); in dal_ddc_service_destroy() 259 *ddc = NULL; in dal_ddc_service_destroy() 380 ddc->ctx, in i2c_read() 381 ddc->link, in i2c_read() 403 ddc, in dal_ddc_service_i2c_query_dp_dual_mode_adaptor() 604 ddc->ctx, in dal_ddc_service_query_ddc_data() 605 ddc->link, in dal_ddc_service_query_ddc_data() 620 if (!ddc) in dal_ddc_submit_aux_command() 690 struct ddc *ddc_pin = ddc->ddc_pin; in dc_link_aux_try_to_configure_timeout() [all …]
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| /linux/drivers/gpu/drm/sun4i/ |
| A D | sun4i_hdmi_ddc_clk.c | 68 ddc->m_offset, NULL, NULL); in sun4i_ddc_round_rate() 78 regmap_field_read(ddc->reg, ®); in sun4i_ddc_recalc_rate() 83 (m + ddc->m_offset); in sun4i_ddc_recalc_rate() 95 regmap_field_write(ddc->reg, in sun4i_ddc_set_rate() 111 struct sun4i_ddc *ddc; in sun4i_ddc_create() local 118 ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL); in sun4i_ddc_create() 119 if (!ddc) in sun4i_ddc_create() 124 if (IS_ERR(ddc->reg)) in sun4i_ddc_create() 125 return PTR_ERR(ddc->reg); in sun4i_ddc_create() 132 ddc->hdmi = hdmi; in sun4i_ddc_create() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_i2c_sw.c | 42 struct ddc *ddc, in read_bit_from_ddc() argument 56 struct ddc *ddc, in write_bit_to_ddc() argument 73 dce_i2c_sw->ddc = NULL; in release_engine_dce_sw() 78 struct ddc *ddc, in wait_for_scl_high_sw() argument 99 struct ddc *ddc_handle, in write_byte_sw() 156 struct ddc *ddc_handle, in read_byte_sw() 216 struct ddc *ddc_handle, in stop_sync_sw() 358 struct ddc *ddc) in dce_i2c_sw_engine_acquire_engine() argument 368 engine->ddc = ddc; in dce_i2c_sw_engine_acquire_engine() 404 struct ddc *ddc = engine->ddc; in dce_i2c_sw_engine_submit_channel_request() local [all …]
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| A D | dce_aux.c | 86 dal_ddc_close(engine->ddc); in release_engine() 88 engine->ddc = NULL; in release_engine() 402 struct ddc *ddc) in acquire() argument 416 dal_ddc_close(ddc); in acquire() 420 engine->ddc = ddc; in acquire() 443 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_configure_timeout() 564 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_raw() 618 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_dmub_raw() 701 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_with_retries() 727 ddc && ddc->link ? ddc->link->link_index : UINT_MAX, in dce_aux_transfer_with_retries() [all …]
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| A D | dce_i2c.c | 30 struct ddc *ddc, in dce_i2c_submit_command() argument 36 if (!ddc) { in dce_i2c_submit_command() 46 dce_i2c_hw = acquire_i2c_hw_engine(pool, ddc); in dce_i2c_submit_command() 49 return dce_i2c_submit_command_hw(pool, ddc, cmd, dce_i2c_hw); in dce_i2c_submit_command() 51 dce_i2c_sw.ctx = ddc->ctx; in dce_i2c_submit_command() 52 if (dce_i2c_engine_acquire_sw(&dce_i2c_sw, ddc)) { in dce_i2c_submit_command() 53 return dce_i2c_submit_command_sw(pool, ddc, cmd, &dce_i2c_sw); in dce_i2c_submit_command()
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| A D | dce_i2c_sw.h | 36 struct ddc *ddc; member 48 struct ddc *ddc, 54 struct ddc *ddc_handle);
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| A D | dce_i2c_hw.c | 395 struct ddc *ddc) in acquire_i2c_hw_engine() argument 401 if (!ddc) in acquire_i2c_hw_engine() 404 if (ddc->hw_info.hw_supported) { in acquire_i2c_hw_engine() 405 enum gpio_ddc_line line = dal_ddc_get_line(ddc); in acquire_i2c_hw_engine() 418 result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE, in acquire_i2c_hw_engine() 434 dce_i2c_hw->ddc = ddc; in acquire_i2c_hw_engine() 583 struct ddc *ddc, in dce_i2c_submit_command_hw() argument 611 dal_ddc_close(dce_i2c_hw->ddc); in dce_i2c_submit_command_hw() 613 dce_i2c_hw->ddc = NULL; in dce_i2c_submit_command_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | dc_link_ddc.h | 78 void dal_ddc_service_destroy(struct ddc_service **ddc); 83 struct ddc_service *ddc, 89 struct ddc_service *ddc, 93 struct ddc_service *ddc, 100 bool dal_ddc_submit_aux_command(struct ddc_service *ddc, 103 int dc_link_aux_transfer_raw(struct ddc_service *ddc, 107 bool dc_link_aux_transfer_with_retries(struct ddc_service *ddc, 110 bool dc_link_aux_try_to_configure_timeout(struct ddc_service *ddc, 121 void ddc_service_set_dongle_type(struct ddc_service *ddc, 126 struct ddc *ddc); [all …]
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | gpio_service_interface.h | 71 struct ddc *dal_gpio_create_ddc( 78 struct ddc **ddc); 103 struct ddc *ddc, 108 struct ddc *ddc, 112 const struct ddc *ddc); 115 struct ddc *ddc, 119 struct ddc *ddc);
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| /linux/drivers/gpu/drm/tegra/ |
| A D | output.c | 35 else if (output->ddc) in tegra_output_connector_get_modes() 36 edid = drm_get_edid(connector, output->ddc); in tegra_output_connector_get_modes() 96 struct device_node *ddc, *panel; in tegra_output_probe() local 125 ddc = of_parse_phandle(output->of_node, "nvidia,ddc-i2c-bus", 0); in tegra_output_probe() 126 if (ddc) { in tegra_output_probe() 127 output->ddc = of_get_i2c_adapter_by_node(ddc); in tegra_output_probe() 128 of_node_put(ddc); in tegra_output_probe() 130 if (!output->ddc) { in tegra_output_probe() 186 if (output->ddc) in tegra_output_remove() 187 i2c_put_adapter(output->ddc); in tegra_output_remove()
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| A D | mediatek,hdmi-ddc.yaml | 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml# 19 - mediatek,mt7623-hdmi-ddc 20 - mediatek,mt8167-hdmi-ddc 21 - mediatek,mt8173-hdmi-ddc 34 - const: ddc-i2c 51 compatible = "mediatek,mt8173-hdmi-ddc"; 55 clock-names = "ddc-i2c";
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| A D | hw_factory_dce110.c | 116 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 120 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 121 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 124 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 132 ddc->shifts = &ddc_shift; in define_ddc_registers() 133 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
| A D | hw_factory_dce60.c | 120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 136 ddc->shifts = &ddc_shift; in define_ddc_registers() 137 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| A D | hw_factory_dce80.c | 120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 136 ddc->shifts = &ddc_shift; in define_ddc_registers() 137 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| A D | hw_factory_dce120.c | 133 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 137 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 138 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 141 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 142 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 149 ddc->shifts = &ddc_shift; in define_ddc_registers() 150 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/bridge/ |
| A D | display-connector.c | 52 if (conn->bridge.ddc && drm_probe_ddc(conn->bridge.ddc)) in display_connector_detect() 87 return drm_get_edid(connector, conn->bridge.ddc); in display_connector_get_edid() 220 conn->bridge.ddc = of_get_i2c_adapter_by_node(phandle); in display_connector_probe() 222 if (!conn->bridge.ddc) in display_connector_probe() 265 if (conn->bridge.ddc) in display_connector_probe() 277 conn->bridge.ddc ? "with" : "without", in display_connector_probe() 295 if (!IS_ERR(conn->bridge.ddc)) in display_connector_remove() 296 i2c_put_adapter(conn->bridge.ddc); in display_connector_remove()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| A D | hw_factory_dcn10.c | 165 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers() 170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers() 173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers() 174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers() 181 ddc->shifts = &ddc_shift; in define_ddc_registers() 182 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| A D | hw_factory_dcn21.c | 173 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 178 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 181 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 182 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() 189 ddc->shifts = &ddc_shift[en]; in define_ddc_registers() 190 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| A D | hw_factory_dcn20.c | 183 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 187 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 188 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 191 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 192 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() 199 ddc->shifts = &ddc_shift[en]; in define_ddc_registers() 200 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| A D | hw_factory_dcn30.c | 201 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local 205 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers() 206 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers() 209 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers() 210 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers() 217 ddc->shifts = &ddc_shift[en]; in define_ddc_registers() 218 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | aux_engine.h | 88 struct ddc *ddc; member 146 struct ddc_service *ddc, 175 struct ddc *ddc);
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