Searched refs:fcsr (Results 1 – 9 of 9) sorted by relevance
| /linux/arch/mips/kernel/ |
| A D | fpu-probe.c | 51 unsigned long sr, mask, fcsr, fcsr0, fcsr1; in cpu_set_fpu_fcsr_mask() local
53 fcsr = c->fpu_csr31; in cpu_set_fpu_fcsr_mask()
59 fcsr0 = fcsr & mask; in cpu_set_fpu_fcsr_mask()
63 fcsr1 = fcsr | ~mask; in cpu_set_fpu_fcsr_mask()
67 write_32bit_cp1_register(CP1_STATUS, fcsr); in cpu_set_fpu_fcsr_mask()
84 unsigned long sr, fir, fcsr, fcsr0, fcsr1; in cpu_set_fpu_2008() local
91 fcsr = read_32bit_cp1_register(CP1_STATUS); in cpu_set_fpu_2008()
103 fcsr1 = fcsr | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; in cpu_set_fpu_2008()
107 write_32bit_cp1_register(CP1_STATUS, fcsr); in cpu_set_fpu_2008()
127 c->fpu_csr31 |= fcsr & FPU_CSR_ABS2008; in cpu_set_fpu_2008()
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| A D | ptrace.c | 590 unsigned int fcsr; member
622 .fcsr = target->thread.fpu.fcr31, in msa_get()
679 target->thread.fpu.fcr31 = ctrl_regs.fcsr & ~FPU_CSR_ALL_X; in msa_set()
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| /linux/arch/riscv/kvm/ |
| A D | vcpu_fp.c | 94 if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr)) in kvm_riscv_vcpu_get_reg_fp()
95 reg_val = &cntx->fp.f.fcsr; in kvm_riscv_vcpu_get_reg_fp()
103 if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { in kvm_riscv_vcpu_get_reg_fp()
106 reg_val = &cntx->fp.d.fcsr; in kvm_riscv_vcpu_get_reg_fp()
140 if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr)) in kvm_riscv_vcpu_set_reg_fp()
141 reg_val = &cntx->fp.f.fcsr; in kvm_riscv_vcpu_set_reg_fp()
149 if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { in kvm_riscv_vcpu_set_reg_fp()
152 reg_val = &cntx->fp.d.fcsr; in kvm_riscv_vcpu_set_reg_fp()
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| /linux/arch/riscv/include/uapi/asm/ |
| A D | ptrace.h | 56 __u32 fcsr; member
61 __u32 fcsr; member
66 __u32 fcsr; member
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| /linux/arch/riscv/kernel/ |
| A D | ptrace.c | 63 membuf_write(&to, fstate, offsetof(struct __riscv_d_ext_state, fcsr)); in riscv_fpr_get()
64 membuf_store(&to, fstate->fcsr); in riscv_fpr_get()
77 offsetof(struct __riscv_d_ext_state, fcsr)); in riscv_fpr_set()
80 offsetof(struct __riscv_d_ext_state, fcsr) + in riscv_fpr_set()
81 sizeof(fstate->fcsr)); in riscv_fpr_set()
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| A D | asm-offsets.c | 71 OFFSET(TASK_THREAD_FCSR, task_struct, thread.fstate.fcsr); in asm_offsets()
231 OFFSET(KVM_ARCH_FP_F_FCSR, kvm_cpu_context, fp.f.fcsr); in asm_offsets()
267 OFFSET(KVM_ARCH_FP_D_FCSR, kvm_cpu_context, fp.d.fcsr); in asm_offsets()
460 offsetof(struct task_struct, thread.fstate.fcsr) in asm_offsets()
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| A D | head.S | 444 csrw fcsr, 0
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| /linux/drivers/input/touchscreen/ |
| A D | ucb1400_ts.c | 321 u16 fcsr; in ucb1400_ts_probe() local
358 fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR); in ucb1400_ts_probe()
359 ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE); in ucb1400_ts_probe()
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| /linux/Documentation/virt/kvm/ |
| A D | api.rst | 2746 0x8020 0000 0500 0020 fcsr Floating point control and status register
2752 0x8020 0000 06 <index into the __riscv_d_ext_state struct:24> (fcsr)
2753 0x8030 0000 06 <index into the __riscv_d_ext_state struct:24> (non-fcsr)
2763 0x8020 0000 0600 0020 fcsr Floating point control and status register
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