| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hpo_dp_stream_encoder.c | 350 hw_crtc_timing.h_sync_width; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
353 h_active_start = hw_crtc_timing.h_sync_width + h_back_porch; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
421 MSA_DATA_LANE_0, hsp | (hw_crtc_timing.h_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
427 MSA_DATA_LANE_0, hw_crtc_timing.h_sync_width & 0xff, in dcn31_hpo_dp_stream_enc_set_stream_attribute()
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| /linux/drivers/video/fbdev/ |
| A D | acornfb.h | 59 u_int h_sync_width; member
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| A D | acornfb.c | 122 vidc.h_sync_width = var->hsync_len - 8; in acornfb_set_timing()
123 vidc.h_border_start = vidc.h_sync_width + var->left_margin + 8 - 12; in acornfb_set_timing()
164 vidc_writel(0x81000000 | vidc.h_sync_width); in acornfb_set_timing()
226 printk(KERN_DEBUG " H-sync-width : %d\n", vidc.h_sync_width); in acornfb_set_timing()
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| A D | mx3fb.c | 508 uint16_t h_start_width, uint16_t h_sync_width, in sdc_init_panel() argument
522 if (v_sync_width == 0 || h_sync_width == 0) in sdc_init_panel()
526 reg = ((uint32_t) (h_sync_width - 1) << 26) | in sdc_init_panel()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_optc.c | 113 if (timing->h_sync_width < optc1->min_h_sync_width || in optc201_validate_timing()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | bios_parser_types.h | 179 uint32_t h_sync_width; member
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.c | 481 hw_crtc_timing.h_sync_width; in dce110_stream_encoder_dp_set_stream_attribute()
484 h_active_start = hw_crtc_timing.h_sync_width + h_back_porch; in dce110_stream_encoder_dp_set_stream_attribute()
502 hw_crtc_timing.h_sync_width, in dce110_stream_encoder_dp_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_stream_encoder.c | 443 hw_crtc_timing.h_sync_width; in enc1_stream_encoder_dp_set_stream_attribute()
446 h_active_start = hw_crtc_timing.h_sync_width + h_back_porch; in enc1_stream_encoder_dp_set_stream_attribute()
461 hw_crtc_timing.h_sync_width, in enc1_stream_encoder_dp_set_stream_attribute()
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| A D | dcn10_optc.c | 194 OTG_H_SYNC_A_END, patched_crtc_timing.h_sync_width); in optc1_program_timing()
607 if (timing->h_sync_width < optc1->min_h_sync_width || in optc1_validate_timing()
1332 hw_crtc_timing->h_sync_width = s.h_sync_a_end - s.h_sync_a_start; in optc1_get_hw_timing()
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| /linux/drivers/gpu/drm/tegra/ |
| A D | hdmi.c | 1170 unsigned int h_sync_width, h_front_porch, h_back_porch, i, rekey; in tegra_hdmi_encoder_enable() local
1194 h_sync_width = mode->hsync_end - mode->hsync_start; in tegra_hdmi_encoder_enable()
1223 pulse_start = 1 + h_sync_width + h_back_porch - 10; in tegra_hdmi_encoder_enable()
1275 value |= HDMI_CTRL_MAX_AC_PACKET((h_sync_width + h_back_porch + in tegra_hdmi_encoder_enable()
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| /linux/drivers/gpu/drm/gma500/ |
| A D | psb_intel_sdvo_regs.h | 78 u8 h_sync_width; /**< lower 8 bits (pixels) */ member
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| A D | psb_intel_sdvo.c | 761 dtd->part2.h_sync_width = h_sync_len & 0xff; in psb_intel_sdvo_get_dtd_from_mode()
786 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; in psb_intel_sdvo_get_mode_from_dtd()
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_sdvo_regs.h | 89 u8 h_sync_width; /* lower 8 bits (pixels) */ member
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| A D | intel_sdvo.c | 865 dtd->part2.h_sync_width = h_sync_len & 0xff; in intel_sdvo_get_dtd_from_mode()
892 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; in intel_sdvo_get_mode_from_dtd()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_hw_types.h | 752 uint32_t h_sync_width; member
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator.c | 316 bp_params.h_sync_width = patched_crtc_timing.h_sync_width; in dce110_timing_generator_program_timing_generator()
1161 timing->h_sync_width); in dce110_timing_generator_validate_timing()
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| A D | dce110_timing_generator_v.c | 325 timing->h_sync_width, in dce110_timing_generator_v_program_blanking()
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| A D | command_table2.c | 605 params.h_syncwidth = cpu_to_le16((uint16_t)bp_params->h_sync_width); in set_crtc_using_dtd_timing_v3()
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| A D | command_table.c | 1837 params.usH_SyncWidth = cpu_to_le16((uint16_t)(bp_params->h_sync_width)); in set_crtc_timing_v1()
1922 params.usH_SyncWidth = cpu_to_le16((uint16_t)bp_params->h_sync_width); in set_crtc_using_dtd_timing_v3()
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| A D | bios_parser2.c | 1159 info->lcd_timing.horizontal_sync_width = le16_to_cpu(lvds->lcd_timing.h_sync_width); in get_embedded_panel_info_v2_1()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 121 timing->h_sync_width < tg110->min_h_sync_width || in dce120_timing_generator_validate_timing()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc.c | 1540 if (crtc_timing->h_sync_width != hw_crtc_timing.h_sync_width) in dc_validate_seamless_boot_timing()
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| /linux/drivers/gpu/drm/amd/include/ |
| A D | atomfirmware.h | 442 uint16_t h_sync_width; member
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.c | 5862 timing_out->h_sync_width = mode_in->hsync_end - mode_in->hsync_start; in fill_stream_properties_from_drm_display_mode()
5872 timing_out->h_sync_width = mode_in->crtc_hsync_end - mode_in->crtc_hsync_start; in fill_stream_properties_from_drm_display_mode()
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