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Searched refs:hw_pp (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_encoder_phys_cmd.c83 if (!phys_enc->hw_pp) in dpu_encoder_phys_cmd_pp_tx_done_irq()
397 phys_enc->hw_pp->ops.setup_tearcheck(phys_enc->hw_pp, &tc_cfg); in dpu_encoder_phys_cmd_tearcheck_config()
398 phys_enc->hw_pp->ops.enable_tearcheck(phys_enc->hw_pp, tc_enable); in dpu_encoder_phys_cmd_tearcheck_config()
475 if (!phys_enc->hw_pp || !phys_enc->hw_pp->ops.connect_external_te) in _dpu_encoder_phys_cmd_connect_te()
479 phys_enc->hw_pp->ops.connect_external_te(phys_enc->hw_pp, enable); in _dpu_encoder_phys_cmd_connect_te()
499 hw_pp = phys_enc->hw_pp; in dpu_encoder_phys_cmd_get_line_count()
503 return hw_pp->ops.get_line_count(hw_pp); in dpu_encoder_phys_cmd_get_line_count()
525 phys_enc->hw_pp->ops.enable_tearcheck(phys_enc->hw_pp, false); in dpu_encoder_phys_cmd_disable()
585 phys_enc->hw_pp->ops.get_vsync_info(phys_enc->hw_pp, &info); in dpu_encoder_phys_cmd_is_ongoing_pptx()
608 if (!phys_enc->hw_pp->ops.get_autorefresh(phys_enc->hw_pp, NULL)) in dpu_encoder_phys_cmd_prepare_commit()
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A Ddpu_encoder.c40 (p) ? ((p)->hw_pp ? (p)->hw_pp->idx - PINGPONG_0 : -1) : -1, \
46 (p) ? ((p)->hw_pp ? (p)->hw_pp->idx - PINGPONG_0 : -1) : -1, \
236 hw_pp->ops.setup_dither(hw_pp, NULL); in _dpu_encoder_setup_dither()
243 hw_pp->ops.setup_dither(hw_pp, &dither_cfg); in _dpu_encoder_setup_dither()
1020 ARRAY_SIZE(hw_pp)); in dpu_encoder_virt_mode_set()
1030 dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i]) in dpu_encoder_virt_mode_set()
1050 if (!dpu_enc->hw_pp[i]) { in dpu_encoder_virt_mode_set()
1062 phys->hw_pp = dpu_enc->hw_pp[i]; in dpu_encoder_virt_mode_set()
1117 if (!dpu_enc->hw_pp[i]) in _dpu_encoder_virt_enable_helper()
1444 if (!phys->hw_pp) { in _dpu_encoder_trigger_flush()
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A Ddpu_encoder_phys_vid.c287 if (phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_setup_timing_engine()
288 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; in dpu_encoder_phys_vid_setup_timing_engine()
300 phys_enc->hw_pp->idx); in dpu_encoder_phys_vid_setup_timing_engine()
302 if (phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_setup_timing_engine()
303 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, intf_cfg.mode_3d); in dpu_encoder_phys_vid_setup_timing_engine()
447 if (ctl->ops.update_pending_flush_merge_3d && phys_enc->hw_pp->merge_3d) in dpu_encoder_phys_vid_enable()
448 ctl->ops.update_pending_flush_merge_3d(ctl, phys_enc->hw_pp->merge_3d->idx); in dpu_encoder_phys_vid_enable()
A Ddpu_encoder_phys.h219 struct dpu_hw_pingpong *hw_pp; member

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