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Searched refs:intel_de_write (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
A Dintel_vdsc.c613 intel_de_write(dev_priv, in intel_dsc_pps_configure()
637 intel_de_write(dev_priv, in intel_dsc_pps_configure()
662 intel_de_write(dev_priv, in intel_dsc_pps_configure()
687 intel_de_write(dev_priv, in intel_dsc_pps_configure()
712 intel_de_write(dev_priv, in intel_dsc_pps_configure()
737 intel_de_write(dev_priv, in intel_dsc_pps_configure()
764 intel_de_write(dev_priv, in intel_dsc_pps_configure()
789 intel_de_write(dev_priv, in intel_dsc_pps_configure()
814 intel_de_write(dev_priv, in intel_dsc_pps_configure()
839 intel_de_write(dev_priv, in intel_dsc_pps_configure()
[all …]
A Dintel_fdi.c342 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
361 intel_de_write(dev_priv, reg, in intel_fdi_normal_train()
391 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
438 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
444 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
455 intel_de_write(dev_priv, reg, in ilk_fdi_link_train()
498 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
547 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
602 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
698 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
[all …]
A Dvlv_dsi.c107 intel_de_write(dev_priv, reg, val); in write_data()
169 intel_de_write(dev_priv, MIPI_INTR_STAT(port), in intel_dsi_host_transfer()
179 intel_de_write(dev_priv, ctrl_reg, in intel_dsi_host_transfer()
338 intel_de_write(dev_priv, MIPI_CTRL(port), in glk_dsi_enable_io()
389 intel_de_write(dev_priv, MIPI_CTRL(PORT_A), in glk_dsi_device_ready()
655 intel_de_write(dev_priv, MIPI_CTRL(port), in intel_dsi_port_enable()
822 intel_de_write(dev_priv, DSPCLK_GATE_D, val); in intel_dsi_pre_enable()
868 intel_de_write(dev_priv, in intel_dsi_pre_enable()
1414 intel_de_write(dev_priv, MIPI_CTRL(PORT_A), in intel_dsi_prepare()
1420 intel_de_write(dev_priv, MIPI_CTRL(port), in intel_dsi_prepare()
[all …]
A Dintel_color.c485 intel_de_write(dev_priv, PIPECONF(pipe), val); in i9xx_color_commit()
498 intel_de_write(dev_priv, PIPECONF(pipe), val); in ilk_color_commit()
508 intel_de_write(dev_priv, GAMMA_MODE(crtc->pipe), in hsw_color_commit()
532 intel_de_write(dev_priv, GAMMA_MODE(crtc->pipe), in skl_color_commit()
555 intel_de_write(dev_priv, PALETTE(pipe, i), in i9xx_load_lut_8()
621 intel_de_write(dev_priv, LGC_PALETTE(pipe, i), in ilk_load_lut_8()
634 intel_de_write(dev_priv, PREC_PALETTE(pipe, i), in ilk_load_lut_10()
685 intel_de_write(dev_priv, PREC_PAL_DATA(pipe), in ivb_load_lut_10()
707 intel_de_write(dev_priv, PREC_PAL_INDEX(pipe), in bdw_load_lut_10()
715 intel_de_write(dev_priv, PREC_PAL_DATA(pipe), in bdw_load_lut_10()
[all …]
A Dicl_dsi.c283 intel_de_write(dev_priv, in dsi_program_swing_and_deemphasis()
326 intel_de_write(dev_priv, DSS_CTL1, dss_ctl1); in configure_dual_link_mode()
447 intel_de_write(dev_priv, in gen11_dsi_config_phy_lanes_sequence()
606 intel_de_write(dev_priv, in gen11_dsi_setup_dphy_timings()
615 intel_de_write(dev_priv, in gen11_dsi_setup_dphy_timings()
821 intel_de_write(dev_priv, in gen11_dsi_configure_transcoder()
952 intel_de_write(dev_priv, HTOTAL(dsi_trans), in gen11_dsi_set_transcoder_timings()
976 intel_de_write(dev_priv, HSYNC(dsi_trans), in gen11_dsi_set_transcoder_timings()
990 intel_de_write(dev_priv, VTOTAL(dsi_trans), in gen11_dsi_set_transcoder_timings()
1004 intel_de_write(dev_priv, VSYNC(dsi_trans), in gen11_dsi_set_transcoder_timings()
[all …]
A Dintel_combo_phy.c83 intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val); in icl_set_procmon_ref_values()
85 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
305 intel_de_write(dev_priv, ICL_PORT_CL_DW10(phy), val); in intel_combo_phy_power_up_lanes()
342 intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); in icl_combo_phys_init()
350 intel_de_write(dev_priv, ICL_PORT_TX_DW8_GRP(phy), val); in icl_combo_phys_init()
355 intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val); in icl_combo_phys_init()
363 intel_de_write(dev_priv, ICL_PORT_COMP_DW8(phy), val); in icl_combo_phys_init()
368 intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val); in icl_combo_phys_init()
372 intel_de_write(dev_priv, ICL_PORT_CL_DW5(phy), val); in icl_combo_phys_init()
406 intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); in icl_combo_phys_uninit()
[all …]
A Dintel_tv.c930 intel_de_write(dev_priv, TV_CTL, in intel_enable_tv()
943 intel_de_write(dev_priv, TV_CTL, in intel_disable_tv()
1403 intel_de_write(dev_priv, TV_CSC_Y, in set_color_conversion()
1405 intel_de_write(dev_priv, TV_CSC_Y2, in set_color_conversion()
1407 intel_de_write(dev_priv, TV_CSC_U, in set_color_conversion()
1409 intel_de_write(dev_priv, TV_CSC_U2, in set_color_conversion()
1411 intel_de_write(dev_priv, TV_CSC_V, in set_color_conversion()
1413 intel_de_write(dev_priv, TV_CSC_V2, in set_color_conversion()
1529 intel_de_write(dev_priv, TV_CLR_LEVEL, in intel_tv_pre_enable()
1554 intel_de_write(dev_priv, TV_H_LUMA(i), in intel_tv_pre_enable()
[all …]
A Dintel_backlight.c259 intel_de_write(dev_priv, in bxt_set_backlight()
342 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, in lpt_disable_backlight()
515 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, in lpt_enable_backlight()
565 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, in pch_enable_backlight()
580 intel_de_write(dev_priv, BLC_PWM_CTL, 0); in i9xx_enable_backlight()
593 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); in i9xx_enable_backlight()
696 intel_de_write(dev_priv, UTIL_PIN_CTL, in bxt_enable_backlight()
705 intel_de_write(dev_priv, in bxt_enable_backlight()
710 intel_de_write(dev_priv, in bxt_enable_backlight()
741 intel_de_write(dev_priv, in cnp_enable_backlight()
[all …]
A Dintel_vrr.c176 intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); in intel_vrr_enable()
177 intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); in intel_vrr_enable()
178 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), trans_vrr_ctl); in intel_vrr_enable()
179 intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); in intel_vrr_enable()
180 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); in intel_vrr_enable()
192 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), in intel_vrr_send_push()
205 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0); in intel_vrr_disable()
206 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); in intel_vrr_disable()
A Dintel_audio.c314 intel_de_write(dev_priv, reg_elda, tmp); in intel_eld_uptodate()
378 intel_de_write(dev_priv, G4X_HDMIW_HDMIEDID, in g4x_audio_codec_enable()
624 intel_de_write(i915, AUD_CONFIG_BE, val); in enable_audio_dsc_wa()
723 intel_de_write(dev_priv, aud_config, tmp); in ilk_audio_codec_disable()
730 intel_de_write(dev_priv, aud_cntrl_st2, tmp); in ilk_audio_codec_disable()
785 intel_de_write(dev_priv, aud_cntrl_st2, tmp); in ilk_audio_codec_enable()
790 intel_de_write(dev_priv, aud_cntl_st, tmp); in ilk_audio_codec_enable()
795 intel_de_write(dev_priv, hdmiw_hdmiedid, in ilk_audio_codec_enable()
812 intel_de_write(dev_priv, aud_config, tmp); in ilk_audio_codec_enable()
1019 intel_de_write(dev_priv, AUD_FREQ_CNTRL, in i915_audio_component_get_power()
[all …]
A Dintel_fbc.c183 intel_de_write(dev_priv, FBC_TAG(i), 0); in i8xx_fbc_activate()
194 intel_de_write(dev_priv, FBC_FENCE_OFF, in i8xx_fbc_activate()
240 intel_de_write(dev_priv, DPFC_FENCE_YOFF, in g4x_fbc_activate()
243 intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0); in g4x_fbc_activate()
324 intel_de_write(dev_priv, SNB_DPFC_CTL_SA, in ilk_fbc_activate()
336 intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF, in ilk_fbc_activate()
394 intel_de_write(dev_priv, SNB_DPFC_CTL_SA, in gen7_fbc_activate()
602 intel_de_write(dev_priv, ILK_DPFC_CB_BASE, in intel_fbc_program_cfb()
605 intel_de_write(dev_priv, DPFC_CB_BASE, in intel_fbc_program_cfb()
615 intel_de_write(dev_priv, FBC_CFB_BASE, in intel_fbc_program_cfb()
[all …]
A Dg4x_hdmi.c55 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val); in intel_hdmi_prepare()
174 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in g4x_enable_hdmi()
201 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
203 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
215 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, in ibx_enable_hdmi()
223 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
225 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
262 intel_de_write(dev_priv, TRANS_CHICKEN1(pipe), in cpt_enable_hdmi()
269 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in cpt_enable_hdmi()
279 intel_de_write(dev_priv, TRANS_CHICKEN1(pipe), in cpt_enable_hdmi()
[all …]
A Dvlv_dsi_pll.c246 intel_de_write(dev_priv, BXT_DSI_PLL_ENABLE, val); in bxt_dsi_pll_disable()
352 intel_de_write(dev_priv, MIPI_CTRL(port), in vlv_dsi_reset_clocks()
399 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV1, in glk_dsi_program_esc_clock()
401 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV2, in glk_dsi_program_esc_clock()
456 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_program_clocks()
519 intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl); in bxt_dsi_pll_enable()
533 intel_de_write(dev_priv, BXT_DSI_PLL_ENABLE, val); in bxt_dsi_pll_enable()
559 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_reset_clocks()
563 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV1, tmp); in bxt_dsi_reset_clocks()
567 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV2, tmp); in bxt_dsi_reset_clocks()
[all …]
A Dintel_dpll_mgr.c472 intel_de_write(dev_priv, PCH_DPLL(id), 0); in ibx_pch_dpll_disable()
1171 intel_de_write(dev_priv, DPLL_CTRL1, val); in skl_ddi_pll_write_ctrl1()
1189 intel_de_write(dev_priv, regs[id].ctl, in skl_ddi_pll_enable()
1209 intel_de_write(dev_priv, regs[id].ctl, in skl_ddi_pll_disable()
3393 intel_de_write(dev_priv, HIP_INDEX_REG(tc_port), in dkl_pll_get_hw_state()
3583 intel_de_write(dev_priv, MG_PLL_FRAC_LOCK(tc_port), in icl_mg_pll_write()
3611 intel_de_write(dev_priv, HIP_INDEX_REG(tc_port), in dkl_pll_write()
3678 intel_de_write(dev_priv, enable_reg, val); in icl_pll_power_enable()
3697 intel_de_write(dev_priv, enable_reg, val); in icl_pll_enable()
3820 intel_de_write(dev_priv, enable_reg, val); in icl_pll_disable()
[all …]
A Dintel_ddi.c154 intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9), in hsw_prepare_hdmi_ddi_buffers()
561 intel_de_write(dev_priv, in intel_ddi_enable_transcoder_func()
596 intel_de_write(dev_priv, in intel_ddi_disable_transcoder_func()
937 intel_de_write(dev_priv, in intel_ddi_disable_pipe_clock()
941 intel_de_write(dev_priv, in intel_ddi_disable_pipe_clock()
1702 intel_de_write(i915, DDI_CLK_SEL(port), in icl_ddi_tc_enable_clock()
2744 intel_de_write(dev_priv, in intel_ddi_post_disable_dp()
3029 intel_de_write(dev_priv, reg, val); in intel_enable_ddi_hdmi()
3041 intel_de_write(dev_priv, reg, val); in intel_enable_ddi_hdmi()
3053 intel_de_write(dev_priv, DDI_BUF_CTL(port), in intel_enable_ddi_hdmi()
[all …]
A Dintel_fifo_underrun.c103 intel_de_write(dev_priv, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_check_fifo_underruns()
122 intel_de_write(dev_priv, reg, in i9xx_set_fifo_underrun_reporting()
156 intel_de_write(dev_priv, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe)); in ivb_check_fifo_underruns()
169 intel_de_write(dev_priv, GEN7_ERR_INT, in ivb_set_fifo_underrun_reporting()
209 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), in bdw_set_fifo_underrun_reporting()
243 intel_de_write(dev_priv, SERR_INT, in cpt_check_pch_fifo_underruns()
259 intel_de_write(dev_priv, SERR_INT, in cpt_set_fifo_underrun_reporting()
420 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns); in intel_cpu_fifo_underrun_irq_handler()
A Dintel_dsb.c56 intel_de_write(i915, DSB_CTRL(pipe, id), dsb_ctrl); in intel_dsb_enable_engine()
74 intel_de_write(i915, DSB_CTRL(pipe, id), dsb_ctrl); in intel_dsb_disable_engine()
103 intel_de_write(dev_priv, reg, val); in intel_dsb_indexed_reg_write()
180 intel_de_write(dev_priv, reg, val); in intel_dsb_reg_write()
224 intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id), in intel_dsb_commit()
240 intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id), in intel_dsb_commit()
A Dintel_hdcp.c466 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
475 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
483 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
492 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
503 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
511 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
608 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
751 intel_de_write(dev_priv, in intel_hdcp_auth()
834 intel_de_write(dev_priv, in intel_hdcp_auth()
923 intel_de_write(dev_priv, HDCP_REP_CTL, in _intel_hdcp_disable()
[all …]
A Dintel_dpio_phy.c299 intel_de_write(dev_priv, BXT_PORT_TX_DW2_GRP(phy, ch), val); in bxt_ddi_phy_set_signal_levels()
392 intel_de_write(dev_priv, BXT_P_CR_GT_DISP_PWRON, val); in _bxt_ddi_phy_init()
414 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW9(phy), val); in _bxt_ddi_phy_init()
419 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW10(phy), val); in _bxt_ddi_phy_init()
425 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW28(phy), val); in _bxt_ddi_phy_init()
430 intel_de_write(dev_priv, BXT_PORT_CL2CM_DW6(phy), val); in _bxt_ddi_phy_init()
448 intel_de_write(dev_priv, BXT_PORT_REF_DW6(phy), grc_code); in _bxt_ddi_phy_init()
452 intel_de_write(dev_priv, BXT_PORT_REF_DW8(phy), val); in _bxt_ddi_phy_init()
460 intel_de_write(dev_priv, BXT_PHY_CTL_FAMILY(phy), val); in _bxt_ddi_phy_init()
472 intel_de_write(dev_priv, BXT_PHY_CTL_FAMILY(phy), val); in bxt_ddi_phy_uninit()
[all …]
A Dintel_hdmi.c286 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe()
301 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe()
368 intel_de_write(dev_priv, reg, val); in cpt_write_infoframe()
383 intel_de_write(dev_priv, reg, val); in cpt_write_infoframe()
443 intel_de_write(dev_priv, reg, val); in vlv_write_infoframe()
446 intel_de_write(dev_priv, in vlv_write_infoframe()
452 intel_de_write(dev_priv, in vlv_write_infoframe()
459 intel_de_write(dev_priv, reg, val); in vlv_write_infoframe()
524 intel_de_write(dev_priv, in hsw_write_infoframe()
531 intel_de_write(dev_priv, in hsw_write_infoframe()
[all …]
A Dintel_pps.c609 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_on_unlocked()
675 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_off_sync_unlocked()
787 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
795 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
803 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
848 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_off_unlocked()
892 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_backlight_on()
913 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_backlight_off()
974 intel_de_write(dev_priv, pp_on_reg, 0); in vlv_detach_power_sequencer()
1289 intel_de_write(dev_priv, regs.pp_ctrl, pp); in pps_init_registers()
[all …]
A Dg4x_dp.c163 intel_de_write(dev_priv, TRANS_DP_CTL(crtc->pipe), trans_dp); in intel_dp_prepare()
228 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on()
243 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on()
262 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_off()
445 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
449 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
469 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
473 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
600 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in cpt_set_link_train()
628 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in g4x_set_link_train()
[all …]
A Dintel_lvds.c215 intel_de_write(dev_priv, PP_CONTROL(0), val); in intel_lvds_pps_init_hw()
217 intel_de_write(dev_priv, PP_ON_DELAYS(0), in intel_lvds_pps_init_hw()
220 intel_de_write(dev_priv, PP_OFF_DELAYS(0), in intel_lvds_pps_init_hw()
223 intel_de_write(dev_priv, PP_DIVISOR(0), in intel_lvds_pps_init_hw()
303 intel_de_write(dev_priv, lvds_encoder->reg, temp); in intel_pre_enable_lvds()
318 intel_de_write(dev_priv, lvds_encoder->reg, in intel_enable_lvds()
321 intel_de_write(dev_priv, PP_CONTROL(0), in intel_enable_lvds()
340 intel_de_write(dev_priv, PP_CONTROL(0), in intel_disable_lvds()
346 intel_de_write(dev_priv, lvds_encoder->reg, in intel_disable_lvds()
A Dintel_snps_phy.c75 intel_de_write(dev_priv, SNPS_PHY_TX_EQ(ln, phy), val); in intel_snps_phy_set_signal_levels()
820 intel_de_write(dev_priv, SNPS_PHY_MPLLB_CP(phy), pll_state->mpllb_cp); in intel_mpllb_enable()
821 intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy), pll_state->mpllb_div); in intel_mpllb_enable()
822 intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV2(phy), pll_state->mpllb_div2); in intel_mpllb_enable()
823 intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy), pll_state->mpllb_sscen); in intel_mpllb_enable()
824 intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy), pll_state->mpllb_sscstep); in intel_mpllb_enable()
825 intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy), pll_state->mpllb_fracn1); in intel_mpllb_enable()
826 intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy), pll_state->mpllb_fracn2); in intel_mpllb_enable()
846 intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy), in intel_mpllb_enable()
/linux/drivers/gpu/drm/i915/
A Di915_suspend.c68 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf()
69 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
72 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf()
75 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
78 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf()
79 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
82 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf()
119 intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB); in i915_restore_display()

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