Home
last modified time | relevance | path

Searched refs:mmSCRATCH_REG3 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
A Dgc_9_4_1_offset.h219 #define mmSCRATCH_REG3 macro
A Dgc_9_0_offset.h4647 #define mmSCRATCH_REG3 macro
A Dgc_9_1_offset.h4877 #define mmSCRATCH_REG3 macro
A Dgc_9_2_1_offset.h4833 #define mmSCRATCH_REG3 macro
A Dgc_10_1_0_offset.h7111 #define mmSCRATCH_REG3 macro
A Dgc_10_3_0_offset.h6736 #define mmSCRATCH_REG3 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
A Dgfx_6_0_d.h1184 #define mmSCRATCH_REG3 0x2143 macro
A Dgfx_7_0_d.h407 #define mmSCRATCH_REG3 0xc043 macro
A Dgfx_7_2_d.h419 #define mmSCRATCH_REG3 0xc043 macro
A Dgfx_8_0_d.h457 #define mmSCRATCH_REG3 0xc043 macro
A Dgfx_8_1_d.h457 #define mmSCRATCH_REG3 0xc043 macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v9_0.c755 …ch_reg3 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3)*4; in gfx_v9_0_rlcg_w()
A Dgfx_v10_0.c1519 (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3) * 4; in gfx_v10_rlcg_rw()

Completed in 1223 milliseconds