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Searched refs:mpc_shift (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_mpc.c44 mpc20->mpc_shift->field_name, mpc20->mpc_mask->field_name
164 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_output_csc()
166 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_output_csc()
222 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
224 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
250 reg->shifts.exp_region0_lut_offset = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
258 reg->shifts.field_region_end = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
262 reg->shifts.field_region_end_base = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_BASE_B; in mpc2_ogam_get_reg_field()
266 reg->shifts.exp_region_start = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_START_B; in mpc2_ogam_get_reg_field()
565 const struct dcn20_mpc_shift *mpc_shift, in dcn20_mpc_construct() argument
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A Ddcn20_mpc.h266 const struct dcn20_mpc_shift *mpc_shift; member
273 const struct dcn20_mpc_shift *mpc_shift,
A Ddcn20_resource.c846 static const struct dcn20_mpc_shift mpc_shift = { variable
1221 &mpc_shift, in dcn20_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_mpc.c40 mpc201->mpc_shift->field_name, mpc201->mpc_mask->field_name
106 const struct dcn201_mpc_shift *mpc_shift, in dcn201_mpc_construct() argument
117 mpc201->mpc_shift = mpc_shift; in dcn201_mpc_construct()
A Ddcn201_mpc.h75 const struct dcn201_mpc_shift *mpc_shift; member
82 const struct dcn201_mpc_shift *mpc_shift,
A Ddcn201_resource.c493 static const struct dcn201_mpc_shift mpc_shift = { variable
735 &mpc_shift, in dcn201_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_mpc.c41 mpc30->mpc_shift->field_name, mpc30->mpc_mask->field_name
181 reg->shifts.field_offset = mpc30->mpc_shift->MPCC_OGAM_RAMA_OFFSET_B; in mpc3_ogam_get_reg_field()
193 reg->shifts.field_region_end = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc3_ogam_get_reg_field()
1083 gam_regs.shifts.csc_c11 = mpc30->mpc_shift->MPCC_GAMUT_REMAP_C11_A; in program_gamut_remap()
1085 gam_regs.shifts.csc_c12 = mpc30->mpc_shift->MPCC_GAMUT_REMAP_C12_A; in program_gamut_remap()
1255 ocsc_regs.shifts.csc_c11 = mpc30->mpc_shift->MPC_OCSC_C11_A; in mpc3_set_output_csc()
1257 ocsc_regs.shifts.csc_c12 = mpc30->mpc_shift->MPC_OCSC_C12_A; in mpc3_set_output_csc()
1297 ocsc_regs.shifts.csc_c11 = mpc30->mpc_shift->MPC_OCSC_C11_A; in mpc3_set_ocsc_default()
1299 ocsc_regs.shifts.csc_c12 = mpc30->mpc_shift->MPC_OCSC_C12_A; in mpc3_set_ocsc_default()
1439 const struct dcn30_mpc_shift *mpc_shift, in dcn30_mpc_construct() argument
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A Ddcn30_mpc.h782 const struct dcn30_mpc_shift *mpc_shift; member
790 const struct dcn30_mpc_shift *mpc_shift,
A Ddcn30_resource.c677 static const struct dcn30_mpc_shift mpc_shift = { variable
987 &mpc_shift, in dcn30_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_mpc.c37 mpc10->mpc_shift->field_name, mpc10->mpc_mask->field_name
505 const struct dcn_mpc_shift *mpc_shift, in dcn10_mpc_construct() argument
516 mpc10->mpc_shift = mpc_shift; in dcn10_mpc_construct()
A Ddcn10_mpc.h130 const struct dcn_mpc_shift *mpc_shift; member
137 const struct dcn_mpc_shift *mpc_shift,
A Ddcn10_resource.c442 static const struct dcn_mpc_shift mpc_shift = { variable
752 &mpc_shift, in dcn10_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_resource.c521 static const struct dcn30_mpc_shift mpc_shift = { variable
824 &mpc_shift, in dcn301_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn302/
A Ddcn302_resource.c775 static const struct dcn30_mpc_shift mpc_shift = { variable
790 dcn30_mpc_construct(mpc30, ctx, &mpc_regs, &mpc_shift, &mpc_mask, num_mpcc, num_rmu); in dcn302_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn303/
A Ddcn303_resource.c720 static const struct dcn30_mpc_shift mpc_shift = { variable
735 dcn30_mpc_construct(mpc30, ctx, &mpc_regs, &mpc_shift, &mpc_mask, num_mpcc, num_rmu); in dcn303_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c515 static const struct dcn20_mpc_shift mpc_shift = { variable
1531 &mpc_shift, in dcn21_mpc_create()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c740 static const struct dcn30_mpc_shift mpc_shift = { variable
1160 &mpc_shift, in dcn31_mpc_create()

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