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Searched refs:mtr (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/infiniband/hw/hns/
A Dhns_roce_mr.c678 if (mtr->umem) { in mtr_free_bufs()
680 mtr->umem = NULL; in mtr_free_bufs()
684 if (mtr->kmem) { in mtr_free_bufs()
686 mtr->kmem = NULL; in mtr_free_bufs()
700 mtr->kmem = NULL; in mtr_alloc_bufs()
705 PTR_ERR(mtr->umem)); in mtr_alloc_bufs()
709 mtr->umem = NULL; in mtr_alloc_bufs()
714 if (IS_ERR(mtr->kmem)) { in mtr_alloc_bufs()
737 if (mtr->umem) in mtr_map_bufs()
1008 mtr->umem = NULL; in hns_roce_mtr_create()
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A Dhns_roce_device.h448 struct hns_roce_mtr mtr; member
470 struct hns_roce_mtr mtr; member
644 struct hns_roce_mtr mtr; member
733 struct hns_roce_mtr mtr; member
1160 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1162 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1167 struct hns_roce_mtr *mtr);
1168 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
A Dhns_roce_srq.c180 ret = hns_roce_mtr_create(hr_dev, &idx_que->mtr, &buf_attr, in alloc_srq_idx()
203 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); in alloc_srq_idx()
214 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); in free_srq_idx()
A Dhns_roce_cq.c113 ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts), in alloc_cqc()
210 ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr, in alloc_cq_buf()
221 hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr); in free_cq_buf()
A Dhns_roce_hw_v2.c902 return hns_roce_buf_offset(idx_que->mtr.kmem, in get_idx_buf()
3359 to_hr_hw_page_shift(hr_cq->mtr.hem_cfg.ba_pg_shift)); in hns_roce_v2_write_cqc()
4225 to_hr_hw_page_shift(hr_qp->mtr.hem_cfg.ba_pg_shift)); in config_qp_rq_buf()
4267 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, in config_qp_sq_buf()
5354 ret = hns_roce_mtr_find(hr_dev, &idx_que->mtr, 0, mtts_idx, in hns_roce_v2_write_srqc_index_queue()
5667 aeqe = hns_roce_buf_offset(eq->mtr.kmem, in next_aeqe_sw_v2()
5755 ceqe = hns_roce_buf_offset(eq->mtr.kmem, in next_ceqe_sw_v2()
5890 hns_roce_mtr_destroy(hr_dev, &eq->mtr); in free_eq_buf()
5932 to_hr_hw_page_shift(eq->mtr.hem_cfg.ba_pg_shift)); in config_eqc()
5934 to_hr_hw_page_shift(eq->mtr.hem_cfg.buf_pg_shift)); in config_eqc()
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A Dhns_roce_qp.c775 ret = hns_roce_mtr_create(hr_dev, &hr_qp->mtr, &buf_attr, in alloc_qp_buf()
792 hns_roce_mtr_destroy(hr_dev, &hr_qp->mtr); in free_qp_buf()
1396 return hns_roce_buf_offset(hr_qp->mtr.kmem, offset); in get_wqe()
A Dhns_roce_hw_v1.c1983 return hns_roce_buf_offset(hr_cq->mtr.kmem, n * HNS_ROCE_V1_CQE_SIZE); in get_cqe()
2557 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, 0, sq_ba, 1, bt_ba); in find_wqe_mtt()
2563 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, hr_qp->rq.offset, rq_ba, in find_wqe_mtt()
/linux/drivers/edac/
A Di5400_edac.c285 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 10)) argument
286 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 9)) argument
287 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 8)) ? 8 : 4) argument
288 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument
290 #define MTR_DIMM_RANK(mtr) (((mtr) >> 5) & 0x1) argument
292 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
294 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
863 int mtr; in determine_mtr() local
882 return mtr; in determine_mtr()
921 int mtr; in handle_channel() local
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A Di7300_edac.c172 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 8)) argument
173 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 7)) argument
174 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument
175 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 5)) ? 8 : 4) argument
176 #define MTR_DIMM_RANKS(mtr) (((mtr) & (1 << 4)) ? 1 : 0) argument
177 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
179 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
180 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
594 mtr = pvt->mtr[slot][branch]; in decode_mtr()
673 return mtr; in decode_mtr()
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A Di5000_edac.c279 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8)) argument
280 #define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4) argument
281 #define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4) argument
283 #define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1) argument
285 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
286 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
287 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
953 int mtr; in determine_mtr() local
960 return mtr; in determine_mtr()
995 int mtr; in handle_channel() local
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A Dsb_edac.c213 #define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19) argument
214 #define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14) argument
215 #define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13) argument
216 #define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4) argument
217 #define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1) argument
701 ranks, max, (unsigned int)RANK_CNT_BITS(mtr), mtr); in numrank()
714 rows, (unsigned int)RANK_WIDTH_BITS(mtr), mtr); in numrow()
727 cols, (unsigned int)COL_WIDTH_BITS(mtr), mtr); in numcol()
944 switch (mtr) { in __ibridge_get_width()
1606 u32 mtr; in __populate_dimms() local
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A Di5100_edac.c334 } mtr[I5100_CHANNELS][I5100_MAX_RANKS_PER_CHAN]; member
659 if (!priv->mtr[chan][chan_rank].present) in i5100_npages()
664 priv->mtr[chan][chan_rank].numcol + in i5100_npages()
665 priv->mtr[chan][chan_rank].numrow + in i5100_npages()
666 priv->mtr[chan][chan_rank].numbank; in i5100_npages()
690 priv->mtr[i][j].present = i5100_mtr_present(w); in i5100_init_mtr()
691 priv->mtr[i][j].ethrottle = i5100_mtr_ethrottle(w); in i5100_init_mtr()
692 priv->mtr[i][j].width = 4 + 4 * i5100_mtr_width(w); in i5100_init_mtr()
694 priv->mtr[i][j].numrow = 13 + i5100_mtr_numrow(w); in i5100_init_mtr()
695 priv->mtr[i][j].numcol = 10 + i5100_mtr_numcol(w); in i5100_init_mtr()
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A Dskx_common.c216 static int get_width(u32 mtr) in get_width() argument
218 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width()
336 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm, in skx_get_dimm_info() argument
344 ranks = numrank(mtr); in skx_get_dimm_info()
345 rows = numrow(mtr); in skx_get_dimm_info()
346 cols = imc->hbm_mc ? 6 : numcol(mtr); in skx_get_dimm_info()
377 dimm->dtype = get_width(mtr); in skx_get_dimm_info()
A Di10nm_base.c452 u32 mtr, amap, mcddrtcfg; in i10nm_get_dimm_config() local
465 mtr = I10NM_GET_DIMMMTR(imc, i, j); in i10nm_get_dimm_config()
467 mtr, mcddrtcfg, imc->mc, i, j); in i10nm_get_dimm_config()
469 if (IS_DIMM_PRESENT(mtr)) in i10nm_get_dimm_config()
470 ndimms += skx_get_dimm_info(mtr, 0, amap, dimm, in i10nm_get_dimm_config()
A Dskx_base.c180 u32 mtr, mcmtr, amap, mcddrtcfg; in skx_get_dimm_config() local
196 0x80 + 4 * j, &mtr); in skx_get_dimm_config()
197 if (IS_DIMM_PRESENT(mtr)) { in skx_get_dimm_config()
198 ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j, cfg); in skx_get_dimm_config()
A Dskx_common.h177 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
/linux/arch/alpha/include/asm/
A Dcore_tsunami.h36 tsunami_64 mtr; member
A Dcore_titan.h37 titan_64 mtr; member
/linux/arch/alpha/kernel/
A Dcore_tsunami.c397 printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr); in tsunami_init_arch()
A Dcore_titan.c373 printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr); in titan_init_arch()
/linux/drivers/net/ethernet/mellanox/mlxsw/
A Dreg.h9697 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);

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