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Searched refs:pll_enable (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm/mach-tegra/
A Dsleep-tegra20.S65 .macro pll_enable, rd, r_car_base, pll_base, test_mask macro
203 pll_enable r1, r0, CLK_RESET_PLLM_BASE, PLLM_STORE_MASK
204 pll_enable r1, r0, CLK_RESET_PLLP_BASE, PLLP_STORE_MASK
205 pll_enable r1, r0, CLK_RESET_PLLC_BASE, PLLC_STORE_MASK
A Dsleep-tegra30.S130 .macro pll_enable, rd, r_car_base, pll_base, pll_misc, test_mask macro
394 pll_enable r1, r0, CLK_RESET_PLLM_BASE, 0, PLLM_STORE_MASK
395 pll_enable r1, r0, CLK_RESET_PLLC_BASE, 0, PLLC_STORE_MASK
396 pll_enable r1, r0, CLK_RESET_PLLX_BASE, 0, PLLX_STORE_MASK
405 pll_enable r1, r0, CLK_RESET_PLLM_BASE, CLK_RESET_PLLM_MISC, PLLM_STORE_MASK
406 pll_enable r1, r0, CLK_RESET_PLLC_BASE, CLK_RESET_PLLC_MISC, PLLC_STORE_MASK
409 pll_enable r1, r0, CLK_RESET_PLLP_BASE, CLK_RESET_PLLP_MISC, PLLP_STORE_MASK
410 pll_enable r1, r0, CLK_RESET_PLLA_BASE, CLK_RESET_PLLA_MISC, PLLA_STORE_MASK
/linux/sound/soc/codecs/
A Dtas2552.c162 u8 pll_enable; in tas2552_setup_pll() local
172 pll_enable = snd_soc_component_read(component, TAS2552_CFG_2) & TAS2552_PLL_ENABLE; in tas2552_setup_pll()
230 pll_enable); in tas2552_setup_pll()
/linux/drivers/clk/
A Dclk-stm32h7.c706 static int pll_enable(struct clk_hw *hw) in pll_enable() function
776 .enable = pll_enable,
871 pll_enable(hwp); in odf_divider_set_rate()
901 pll_enable(hwp); in odf_gate_enable()
924 pll_enable(hwp); in odf_gate_disable()
A Dclk-stm32mp1.c764 static int pll_enable(struct clk_hw *hw) in pll_enable() function
876 .enable = pll_enable,

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