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Searched refs:pwr_reg (Results 1 – 25 of 31) sorted by relevance

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/linux/sound/soc/codecs/
A Dwm8940.c471 u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0; in wm8940_set_bias_level() local
477 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
484 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level()
488 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
489 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level()
501 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
503 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2); in wm8940_set_bias_level()
506 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg); in wm8940_set_bias_level()
A Dwm8961.c197 u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2); in wm8961_hp_event() local
212 pwr_reg |= WM8961_LOUT1_PGA | WM8961_ROUT1_PGA; in wm8961_hp_event()
213 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_hp_event()
271 pwr_reg &= ~(WM8961_LOUT1_PGA | WM8961_ROUT1_PGA); in wm8961_hp_event()
272 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_hp_event()
287 u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2); in wm8961_spk_event() local
292 pwr_reg |= WM8961_SPKL_PGA | WM8961_SPKR_PGA; in wm8961_spk_event()
293 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_spk_event()
306 pwr_reg &= ~(WM8961_SPKL_PGA | WM8961_SPKR_PGA); in wm8961_spk_event()
307 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_spk_event()
A Dwm8971.c564 u16 pwr_reg = snd_soc_component_read(component, WM8971_PWR1) & 0xfe3e; in wm8971_set_bias_level() local
569 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x00c1); in wm8971_set_bias_level()
579 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x01c0); in wm8971_set_bias_level()
584 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x0140); in wm8971_set_bias_level()
A Dwm8750.c624 u16 pwr_reg = snd_soc_component_read(component, WM8750_PWR1) & 0xfe3e; in wm8750_set_bias_level() local
629 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x00c0); in wm8750_set_bias_level()
638 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x01c1); in wm8750_set_bias_level()
645 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x0141); in wm8750_set_bias_level()
A Dwm8988.c726 u16 pwr_reg = snd_soc_component_read(component, WM8988_PWR1) & ~0x1c1; in wm8988_set_bias_level() local
734 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x00c0); in wm8988_set_bias_level()
742 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x1c1); in wm8988_set_bias_level()
749 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x0141); in wm8988_set_bias_level()
A Dwm8958-dsp2.c327 int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5); in wm8958_dsp_apply() local
332 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA); in wm8958_dsp_apply()
336 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA); in wm8958_dsp_apply()
340 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA); in wm8958_dsp_apply()
352 if (!pwr_reg) in wm8958_dsp_apply()
358 path, wm8994->dsp_active, start, pwr_reg, reg); in wm8958_dsp_apply()
A Dwm8753.c1334 u16 pwr_reg = snd_soc_component_read(component, WM8753_PWR1) & 0xfe3e; in wm8753_set_bias_level() local
1339 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x00c0); in wm8753_set_bias_level()
1348 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x01c1); in wm8753_set_bias_level()
1353 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x0141); in wm8753_set_bias_level()
A Dwm8904.c701 int pwr_reg; in out_pga_event() local
711 pwr_reg = WM8904_POWER_MANAGEMENT_2; in out_pga_event()
719 pwr_reg = WM8904_POWER_MANAGEMENT_3; in out_pga_event()
734 snd_soc_component_update_bits(component, pwr_reg, in out_pga_event()
831 snd_soc_component_update_bits(component, pwr_reg, in out_pga_event()
/linux/drivers/mmc/host/
A Dmmci_stm32_sdmmc.c299 pwr |= host->pwr_reg & (MCI_STM32_VSWITCHEN | in mmci_sdmmc_set_pwrreg()
474 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCHEN); in sdmmc_pre_sig_volt_vswitch()
486 host->pwr_reg & MCI_STM32_VSWITCHEN) { in sdmmc_post_sig_volt_switch()
487 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCH); in sdmmc_post_sig_volt_switch()
499 mmci_write_pwrreg(host, host->pwr_reg & in sdmmc_post_sig_volt_switch()
529 host->pwr_reg = readl_relaxed(host->base + MMCIPOWER); in sdmmc_variant_init()
A Dmmci.h407 u32 pwr_reg; member
A Dmmci.c381 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
382 host->pwr_reg = pwr; in mmci_write_pwrreg()
1684 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
2330 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
/linux/drivers/pinctrl/renesas/
A Dpinctrl-rzg2l.c469 u32 pwr_reg = 0x0; in rzg2l_pinctrl_pinconf_get() local
472 pwr_reg = SD_CH(0); in rzg2l_pinctrl_pinconf_get()
474 pwr_reg = SD_CH(1); in rzg2l_pinctrl_pinconf_get()
476 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_get()
481 addr = pctrl->base + pwr_reg; in rzg2l_pinctrl_pinconf_get()
547 u32 pwr_reg = 0x0; in rzg2l_pinctrl_pinconf_set() local
553 pwr_reg = SD_CH(0); in rzg2l_pinctrl_pinconf_set()
555 pwr_reg = SD_CH(1); in rzg2l_pinctrl_pinconf_set()
557 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_set()
561 addr = pctrl->base + pwr_reg; in rzg2l_pinctrl_pinconf_set()
/linux/drivers/gpu/drm/msm/hdmi/
A Dhdmi.c363 HDMI_CFG(pwr_reg, 8x74),
373 HDMI_CFG(pwr_reg, 8x74),
381 HDMI_CFG(pwr_reg, 8x74),
389 HDMI_CFG(pwr_reg, none),
/linux/drivers/usb/gadget/udc/
A Ds3c2410_udc.c119 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg; in s3c2410_udc_debugfs_show() local
125 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); in s3c2410_udc_debugfs_show()
158 addr_reg, pwr_reg, ep_int_reg, usb_int_reg, in s3c2410_udc_debugfs_show()
841 int pwr_reg; in s3c2410_udc_irq() local
864 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); in s3c2410_udc_irq()
870 usb_status, usbd_status, pwr_reg, ep0csr); in s3c2410_udc_irq()
885 ep0csr, pwr_reg); in s3c2410_udc_irq()
960 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { in s3c2410_udc_irq()
/linux/drivers/clk/mediatek/
A Dclk-mt8195-apusys_pll.c31 .pwr_reg = _pwr_reg, \
A Dclk-mt8195-apmixedsys.c38 .pwr_reg = _pwr_reg, \
A Dclk-mtk.h219 u32 pwr_reg; member
A Dclk-mt8135.c600 .pwr_reg = _pwr_reg, \
A Dclk-pll.c327 pll->pwr_addr = base + data->pwr_reg; in mtk_clk_register_pll()
A Dclk-mt7629.c30 .pwr_reg = _pwr_reg, \
A Dclk-mt6797.c615 .pwr_reg = _pwr_reg, \
A Dclk-mt7622.c30 .pwr_reg = _pwr_reg, \
A Dclk-mt8516.c742 .pwr_reg = _pwr_reg, \
A Dclk-mt2701.c923 .pwr_reg = _pwr_reg, \
A Dclk-mt6779.c1153 .pwr_reg = _pwr_reg, \

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