Searched refs:ras_funcs (Results 1 – 20 of 20) sorted by relevance
437 if (adev->umc.ras_funcs && in amdgpu_gmc_ras_late_init()444 if (adev->mmhub.ras_funcs && in amdgpu_gmc_ras_late_init()454 if (adev->gmc.xgmi.ras_funcs && in amdgpu_gmc_ras_late_init()461 if (adev->hdp.ras_funcs && in amdgpu_gmc_ras_late_init()468 if (adev->mca.mp0.ras_funcs && in amdgpu_gmc_ras_late_init()475 if (adev->mca.mp1.ras_funcs && in amdgpu_gmc_ras_late_init()482 if (adev->mca.mpio.ras_funcs && in amdgpu_gmc_ras_late_init()494 if (adev->umc.ras_funcs && in amdgpu_gmc_ras_fini()498 if (adev->mmhub.ras_funcs && in amdgpu_gmc_ras_fini()502 if (adev->gmc.xgmi.ras_funcs && in amdgpu_gmc_ras_fini()[all …]
908 if (adev->umc.ras_funcs && in amdgpu_ras_query_error_status()914 if (adev->umc.ras_funcs && in amdgpu_ras_query_error_status()926 if (adev->gfx.ras_funcs && in amdgpu_ras_query_error_status()930 if (adev->gfx.ras_funcs && in amdgpu_ras_query_error_status()954 if (adev->hdp.ras_funcs && in amdgpu_ras_query_error_status()1024 if (adev->gfx.ras_funcs && in amdgpu_ras_reset_error_status()1028 if (adev->gfx.ras_funcs && in amdgpu_ras_reset_error_status()1046 if (adev->hdp.ras_funcs && in amdgpu_ras_reset_error_status()1109 if (adev->gfx.ras_funcs && in amdgpu_ras_error_inject()1740 if (adev->gfx.ras_funcs && in amdgpu_ras_error_status_query()[all …]
62 if (adev->umc.ras_funcs && in amdgpu_umc_ras_late_init()63 adev->umc.ras_funcs->err_cnt_init) in amdgpu_umc_ras_late_init()64 adev->umc.ras_funcs->err_cnt_init(adev); in amdgpu_umc_ras_late_init()99 if (adev->umc.ras_funcs && in amdgpu_umc_process_ras_data_cb()100 adev->umc.ras_funcs->query_ras_error_count) in amdgpu_umc_process_ras_data_cb()101 adev->umc.ras_funcs->query_ras_error_count(adev, ras_error_status); in amdgpu_umc_process_ras_data_cb()103 if (adev->umc.ras_funcs && in amdgpu_umc_process_ras_data_cb()104 adev->umc.ras_funcs->query_ras_error_address && in amdgpu_umc_process_ras_data_cb()120 adev->umc.ras_funcs->query_ras_error_address(adev, ras_error_status); in amdgpu_umc_process_ras_data_cb()
121 mca->mp0.ras_funcs = &mca_v3_0_mp0_ras_funcs; in mca_v3_0_init()122 mca->mp1.ras_funcs = &mca_v3_0_mp1_ras_funcs; in mca_v3_0_init()123 mca->mpio.ras_funcs = &mca_v3_0_mpio_ras_funcs; in mca_v3_0_init()
82 .sysfs_name = mca_dev->ras_funcs->sysfs_name, in amdgpu_mca_ras_late_init()89 mca_dev->ras_if->block = mca_dev->ras_funcs->ras_block; in amdgpu_mca_ras_late_init()90 mca_dev->ras_if->sub_block_index = mca_dev->ras_funcs->ras_sub_block; in amdgpu_mca_ras_late_init()
1164 adev->umc.ras_funcs = &umc_v6_1_ras_funcs; in gmc_v9_0_set_umc_funcs()1172 adev->umc.ras_funcs = &umc_v6_1_ras_funcs; in gmc_v9_0_set_umc_funcs()1180 adev->umc.ras_funcs = &umc_v6_7_ras_funcs; in gmc_v9_0_set_umc_funcs()1210 adev->mmhub.ras_funcs = &mmhub_v1_0_ras_funcs; in gmc_v9_0_set_mmhub_ras_funcs()1213 adev->mmhub.ras_funcs = &mmhub_v9_4_ras_funcs; in gmc_v9_0_set_mmhub_ras_funcs()1216 adev->mmhub.ras_funcs = &mmhub_v1_7_ras_funcs; in gmc_v9_0_set_mmhub_ras_funcs()1231 adev->hdp.ras_funcs = &hdp_v4_0_ras_funcs; in gmc_v9_0_set_hdp_ras_funcs()1303 if (adev->mmhub.ras_funcs && in gmc_v9_0_late_init()1304 adev->mmhub.ras_funcs->reset_ras_error_count) in gmc_v9_0_late_init()1307 if (adev->hdp.ras_funcs && in gmc_v9_0_late_init()[all …]
202 if (adev->nbio.ras_funcs && in amdgpu_irq_handler()203 adev->nbio.ras_funcs->handle_ras_controller_intr_no_bifring) in amdgpu_irq_handler()204 adev->nbio.ras_funcs->handle_ras_controller_intr_no_bifring(adev); in amdgpu_irq_handler()206 if (adev->nbio.ras_funcs && in amdgpu_irq_handler()207 adev->nbio.ras_funcs->handle_ras_err_event_athub_intr_no_bifring) in amdgpu_irq_handler()208 adev->nbio.ras_funcs->handle_ras_err_event_athub_intr_no_bifring(adev); in amdgpu_irq_handler()
1227 if (adev->nbio.ras_funcs && in soc15_common_late_init()1228 adev->nbio.ras_funcs->ras_late_init) in soc15_common_late_init()1229 r = adev->nbio.ras_funcs->ras_late_init(adev); in soc15_common_late_init()1250 if (adev->nbio.ras_funcs && in soc15_common_sw_fini()1251 adev->nbio.ras_funcs->ras_fini) in soc15_common_sw_fini()1252 adev->nbio.ras_funcs->ras_fini(adev); in soc15_common_sw_fini()1316 if (adev->nbio.ras_funcs && in soc15_common_hw_fini()1317 adev->nbio.ras_funcs->init_ras_controller_interrupt) in soc15_common_hw_fini()1319 if (adev->nbio.ras_funcs && in soc15_common_hw_fini()1320 adev->nbio.ras_funcs->init_ras_err_event_athub_interrupt) in soc15_common_hw_fini()
46 const struct amdgpu_hdp_ras_funcs *ras_funcs; member
38 const struct amdgpu_mca_ras_funcs *ras_funcs; member
53 const struct amdgpu_mmhub_ras_funcs *ras_funcs; member
72 const struct amdgpu_umc_ras_funcs *ras_funcs; member
107 const struct amdgpu_nbio_ras_funcs *ras_funcs; member
698 if (adev->gfx.ras_funcs && in amdgpu_gfx_process_ras_data_cb()699 adev->gfx.ras_funcs->query_ras_error_count) in amdgpu_gfx_process_ras_data_cb()700 adev->gfx.ras_funcs->query_ras_error_count(adev, err_data); in amdgpu_gfx_process_ras_data_cb()
162 const struct amdgpu_xgmi_ras_funcs *ras_funcs; member
743 adev->gmc.xgmi.ras_funcs->reset_ras_error_count(adev); in amdgpu_xgmi_ras_late_init()937 adev->gmc.xgmi.ras_funcs->reset_ras_error_count(adev); in amdgpu_xgmi_query_ras_error_count()
340 const struct amdgpu_gfx_ras_funcs *ras_funcs; member
2174 adev->gfx.ras_funcs = &gfx_v9_0_ras_funcs; in gfx_v9_0_gpu_early_init()2201 adev->gfx.ras_funcs = &gfx_v9_4_ras_funcs; in gfx_v9_0_gpu_early_init()2222 adev->gfx.ras_funcs = &gfx_v9_4_2_ras_funcs; in gfx_v9_0_gpu_early_init()2456 if (adev->gfx.ras_funcs && in gfx_v9_0_sw_fini()2457 adev->gfx.ras_funcs->ras_fini) in gfx_v9_0_sw_fini()2458 adev->gfx.ras_funcs->ras_fini(adev); in gfx_v9_0_sw_fini()4813 if (adev->gfx.ras_funcs && in gfx_v9_0_ecc_late_init()4814 adev->gfx.ras_funcs->ras_late_init) { in gfx_v9_0_ecc_late_init()4815 r = adev->gfx.ras_funcs->ras_late_init(adev); in gfx_v9_0_ecc_late_init()4820 if (adev->gfx.ras_funcs && in gfx_v9_0_ecc_late_init()[all …]
3289 if (adev->mmhub.ras_funcs && in amdgpu_device_xgmi_reset_func()3290 adev->mmhub.ras_funcs->reset_ras_error_count) in amdgpu_device_xgmi_reset_func()3291 adev->mmhub.ras_funcs->reset_ras_error_count(adev); in amdgpu_device_xgmi_reset_func()4594 if (tmp_adev->mmhub.ras_funcs && in amdgpu_do_asic_reset()4595 tmp_adev->mmhub.ras_funcs->reset_ras_error_count) in amdgpu_do_asic_reset()4596 tmp_adev->mmhub.ras_funcs->reset_ras_error_count(tmp_adev); in amdgpu_do_asic_reset()
667 adev->umc.ras_funcs = &umc_v8_7_ras_funcs; in gmc_v10_0_set_umc_funcs()
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