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Searched refs:readl_relaxed (Results 1 – 25 of 669) sorted by relevance

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/linux/drivers/crypto/ux500/cryp/
A Dcryp.c45 readl_relaxed(&device_data->base->periphId0)) in cryp_check()
47 readl_relaxed(&device_data->base->periphId1)) in cryp_check()
49 readl_relaxed(&device_data->base->periphId3)) in cryp_check()
51 readl_relaxed(&device_data->base->pcellId0)) in cryp_check()
53 readl_relaxed(&device_data->base->pcellId1)) in cryp_check()
55 readl_relaxed(&device_data->base->pcellId2)) in cryp_check()
57 readl_relaxed(&device_data->base->pcellId3))) { in cryp_check()
99 while (readl_relaxed(&device_data->base->sr) != in cryp_flush_inoutfifo()
310 ctx->din = readl_relaxed(&src_reg->din); in cryp_save_device_context()
316 ctx->key_4_l = readl_relaxed(&src_reg->key_4_l); in cryp_save_device_context()
[all …]
/linux/drivers/usb/phy/
A Dphy-tegra-usb.c431 val = readl_relaxed(base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
437 val = readl_relaxed(base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
490 val = readl_relaxed(base + USB_SUSP_CTRL); in utmi_phy_power_on()
500 val = readl_relaxed(base + UTMIP_TX_CFG0); in utmi_phy_power_on()
540 val = readl_relaxed(base + USB_SUSP_CTRL); in utmi_phy_power_on()
616 val = readl_relaxed(base + USB_SUSP_CTRL); in utmi_phy_power_on()
634 val = readl_relaxed(base + USB_USBMODE); in utmi_phy_power_on()
719 val = readl_relaxed(base + UTMIP_TX_CFG0); in utmi_phy_preresume()
729 val = readl_relaxed(base + UTMIP_TX_CFG0); in utmi_phy_postresume()
784 val = readl_relaxed(base + USB_SUSP_CTRL); in ulpi_phy_power_on()
[all …]
/linux/drivers/cpufreq/
A Ds5pv210-cpufreq.c296 reg = readl_relaxed(S5P_CLK_DIV2); in s5pv210_target()
311 reg = readl_relaxed(S5P_CLK_SRC2); in s5pv210_target()
330 reg = readl_relaxed(S5P_CLK_SRC0); in s5pv210_target()
342 reg = readl_relaxed(S5P_CLK_DIV0); in s5pv210_target()
365 reg = readl_relaxed(S5P_ARM_MCS_CON); in s5pv210_target()
389 reg = readl_relaxed(S5P_APLL_CON); in s5pv210_target()
397 reg = readl_relaxed(S5P_CLK_SRC2); in s5pv210_target()
411 reg = readl_relaxed(S5P_CLK_DIV2); in s5pv210_target()
423 reg = readl_relaxed(S5P_CLK_SRC0); in s5pv210_target()
446 reg = readl_relaxed(S5P_CLK_DIV6); in s5pv210_target()
[all …]
/linux/drivers/clk/berlin/
A Dberlin2-avpll.c118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
145 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable()
163 reg = readl_relaxed(vco->base + VCO_CTRL1); in berlin2_avpll_vco_recalc_rate()
220 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_is_enabled()
231 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
243 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable()
258 reg = readl_relaxed(ch->base + VCO_CTRL30); in berlin2_avpll_channel_recalc_rate()
294 reg = readl_relaxed(ch->base + VCO_CTRL11); in berlin2_avpll_channel_recalc_rate()
297 reg = readl_relaxed(ch->base + VCO_CTRL12); in berlin2_avpll_channel_recalc_rate()
[all …]
A Dberlin2-div.c74 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
92 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_enable()
111 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_disable()
129 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_set_parent()
138 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_set_parent()
161 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_get_parent()
164 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_get_parent()
186 divsw = readl_relaxed(div->base + map->div_switch_offs) & in berlin2_div_recalc_rate()
188 div3sw = readl_relaxed(div->base + map->div3_switch_offs) & in berlin2_div_recalc_rate()
200 reg = readl_relaxed(div->base + map->div_select_offs); in berlin2_div_recalc_rate()
/linux/drivers/gpio/
A Dgpio-xgs-iproc.c128 event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE); in iproc_gpio_irq_set_type()
138 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
143 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_set_type()
173 int_status = readl_relaxed(chip->intr + IPROC_CCA_INT_STS); in iproc_gpio_irq_handler()
179 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); in iproc_gpio_irq_handler()
180 event &= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT); in iproc_gpio_irq_handler()
181 level = readl_relaxed(chip->base + IPROC_GPIO_CCA_DIN); in iproc_gpio_irq_handler()
182 level ^= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL); in iproc_gpio_irq_handler()
184 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_handler()
248 val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK); in iproc_gpio_probe()
[all …]
A Dgpio-omap.c96 u32 val = readl_relaxed(reg); in omap_gpio_rmw()
329 writel_relaxed(readl_relaxed(reg) ^ BIT(gpio), reg); in omap_toggle_gpio_edge_triggering()
344 l = readl_relaxed(reg); in omap_set_gpio_triggering()
362 l = readl_relaxed(reg); in omap_set_gpio_triggering()
386 ctrl = readl_relaxed(reg); in omap_enable_gpio_module()
400 ctrl = readl_relaxed(reg); in omap_disable_gpio_module()
412 return readl_relaxed(reg) & BIT(offset); in omap_gpio_is_input()
483 readl_relaxed(reg); in omap_clear_gpio_irqbank()
499 l = readl_relaxed(reg); in omap_get_gpio_irqbank_mask()
579 isr = readl_relaxed(isr_reg) & enabled; in omap_gpio_irq_handler()
[all …]
/linux/drivers/clk/samsung/
A Dclk-pll.c121 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_enable()
133 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_disable()
156 pll_con = readl_relaxed(pll->con_reg); in samsung_pll2126_recalc_rate()
189 pll_con = readl_relaxed(pll->con_reg); in samsung_pll3000_recalc_rate()
226 pll_con = readl_relaxed(pll->con_reg); in samsung_pll35xx_recalc_rate()
263 tmp = readl_relaxed(pll->con_reg); in samsung_pll35xx_set_rate()
665 con0 = readl_relaxed(pll->con_reg); in samsung_pll45xx_set_rate()
802 con0 = readl_relaxed(pll->con_reg); in samsung_pll46xx_set_rate()
1007 tmp = readl_relaxed(pll->con_reg); in samsung_s3c2410_pll_set_rate()
1203 tmp = readl_relaxed(pll->con_reg); in samsung_pll2550xx_set_rate()
[all …]
/linux/arch/arm/mach-mv78xx0/
A Dirq.c34 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF); in mv78xx0_legacy_handle_irq()
35 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF); in mv78xx0_legacy_handle_irq()
41 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF); in mv78xx0_legacy_handle_irq()
42 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF); in mv78xx0_legacy_handle_irq()
48 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF); in mv78xx0_legacy_handle_irq()
49 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF); in mv78xx0_legacy_handle_irq()
/linux/drivers/watchdog/
A Domap_wdt.c76 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) in omap_wdt_reload()
83 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) in omap_wdt_reload()
94 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) in omap_wdt_enable()
98 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) in omap_wdt_enable()
108 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) in omap_wdt_disable()
112 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) in omap_wdt_disable()
123 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) in omap_wdt_set_timer()
127 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) in omap_wdt_set_timer()
150 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) in omap_wdt_start()
154 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) in omap_wdt_start()
[all …]
/linux/drivers/clk/imx/
A Dclk-frac-pll.c57 if (readl_relaxed(pll->base) & (PLL_PD_MASK | PLL_BYPASS_MASK)) in clk_wait_ack()
70 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_prepare()
82 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_unprepare()
92 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_is_prepared()
104 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_recalc_rate()
106 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_recalc_rate()
172 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_set_rate()
177 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
182 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
189 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
A Dclk-pllv3.c62 u32 val = readl_relaxed(pll->base) & pll->power_bit; in clk_pllv3_wait_lock()
77 val = readl_relaxed(pll->base); in clk_pllv3_prepare()
92 val = readl_relaxed(pll->base); in clk_pllv3_unprepare()
104 if (readl_relaxed(pll->base) & BM_PLL_LOCK) in clk_pllv3_is_prepared()
141 val = readl_relaxed(pll->base); in clk_pllv3_set_rate()
162 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate()
196 val = readl_relaxed(pll->base); in clk_pllv3_sys_set_rate()
219 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_av_recalc_rate()
283 val = readl_relaxed(pll->base); in clk_pllv3_av_set_rate()
350 mf.mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv3_vf610_recalc_rate()
[all …]
/linux/arch/arm/common/
A Dsa1111.c259 ie = readl_relaxed(mapbase + SA1111_INTEN0); in sa1111_mask_irq()
270 ie = readl_relaxed(mapbase + SA1111_INTEN0); in sa1111_unmask_irq()
289 ip = readl_relaxed(mapbase + SA1111_INTPOL0); in sa1111_retrigger_irq()
318 ip = readl_relaxed(mapbase + SA1111_INTPOL0); in sa1111_type_irq()
335 we = readl_relaxed(mapbase + SA1111_WAKEEN0); in sa1111_wake_irq()
506 val = readl_relaxed(reg); in sa1111_gpio_modify()
647 r = readl_relaxed(sachip->base + SA1111_SKCR); in sa1111_wake()
843 id = readl_relaxed(sachip->base + SA1111_SKID); in __sa1111_probe()
1012 val = readl_relaxed(sachip->base + SA1111_SKCR); in sa1111_suspend_noirq()
1050 id = readl_relaxed(sachip->base + SA1111_SKID); in sa1111_resume_noirq()
[all …]
/linux/drivers/irqchip/
A Dirq-sa11x0.c38 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
47 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
93 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend()
94 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend()
95 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend()
136 icip = readl_relaxed(iobase + ICIP); in sa1100_handle_irq()
137 icmr = readl_relaxed(iobase + ICMR); in sa1100_handle_irq()
/linux/drivers/clk/ti/
A Dfapll.c88 u32 v = readl_relaxed(fd->base); in ti_fapll_clock_is_bypass()
98 u32 v = readl_relaxed(fd->base); in ti_fapll_set_bypass()
109 u32 v = readl_relaxed(fd->base); in ti_fapll_clear_bypass()
141 u32 v = readl_relaxed(fd->base); in ti_fapll_enable()
153 u32 v = readl_relaxed(fd->base); in ti_fapll_disable()
162 u32 v = readl_relaxed(fd->base); in ti_fapll_is_enabled()
180 v = readl_relaxed(fd->base); in ti_fapll_recalc_rate()
260 v = readl_relaxed(fd->base); in ti_fapll_set_rate()
399 v = readl_relaxed(synth->freq); in ti_fapll_synth_set_frac_rate()
473 v = readl_relaxed(synth->div); in ti_fapll_synth_set_rate()
[all …]
/linux/arch/arm/mach-hisi/
A Dhotplug.c105 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
115 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
201 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0); in hix5hd2_set_cpu()
206 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20); in hix5hd2_set_cpu()
211 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0); in hix5hd2_set_cpu()
217 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20); in hix5hd2_set_cpu()
238 temp = readl_relaxed(ctrl_base + HIP01_PERI9); in hip01_set_cpu()
245 temp = readl_relaxed(ctrl_base + HIP01_PERI9); in hip01_set_cpu()
/linux/drivers/rtc/
A Drtc-rtd119x.c59 val = readl_relaxed(data->base + RTD_RTCCR); in rtd119x_rtc_reset()
72 val = readl_relaxed(data->base + RTD_RTCEN); in rtd119x_rtc_set_enabled()
91 tm->tm_sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; in rtd119x_rtc_read_time()
92 tm->tm_min = readl_relaxed(data->base + RTD_RTCMIN) & RTD_RTCMIN_RTCMIN_MASK; in rtd119x_rtc_read_time()
93 tm->tm_hour = readl_relaxed(data->base + RTD_RTCHR) & RTD_RTCHR_RTCHR_MASK; in rtd119x_rtc_read_time()
94 day = readl_relaxed(data->base + RTD_RTCDATE1) & RTD_RTCDATE1_RTCDATE1_MASK; in rtd119x_rtc_read_time()
95 day |= (readl_relaxed(data->base + RTD_RTCDATE2) & RTD_RTCDATE2_RTCDATE2_MASK) << 8; in rtd119x_rtc_read_time()
96 sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; in rtd119x_rtc_read_time()
193 val = readl_relaxed(data->base + RTD_RTCACR); in rtd119x_rtc_probe()
A Drtc-sa1100.c55 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_interrupt()
100 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_alarm_irq_enable()
114 rtc_time64_to_tm(readl_relaxed(info->rcnr), tm); in sa1100_rtc_read_time()
132 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_read_alarm()
143 writel_relaxed(readl_relaxed(info->rtsr) & in sa1100_rtc_set_alarm()
147 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr); in sa1100_rtc_set_alarm()
149 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr); in sa1100_rtc_set_alarm()
159 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr)); in sa1100_rtc_proc()
160 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr)); in sa1100_rtc_proc()
196 if (readl_relaxed(info->rttr) == 0) { in sa1100_rtc_init()
/linux/drivers/edac/
A Dal_mc_edac.c83 eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT); in handle_ce()
88 ecccaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR0); in handle_ce()
89 ecccaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR1); in handle_ce()
90 ecccsyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND0); in handle_ce()
91 ecccsyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND1); in handle_ce()
92 ecccsyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND2); in handle_ce()
133 eccuaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR0); in handle_ue()
134 eccuaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR1); in handle_ue()
135 eccusyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND0); in handle_ue()
136 eccusyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND1); in handle_ue()
[all …]
/linux/drivers/mmc/host/
A Dsdhci-msm.c649 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
655 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
662 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
668 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
681 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
691 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
702 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
708 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
745 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
751 config = readl_relaxed(host->ioaddr + in msm_init_cm_dll()
[all …]
/linux/drivers/phy/qualcomm/
A Dphy-qcom-ipq806x-sata.c59 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM3); in qcom_ipq806x_sata_phy_init()
63 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM0) & in qcom_ipq806x_sata_phy_init()
70 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM1) & in qcom_ipq806x_sata_phy_init()
79 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM2) & in qcom_ipq806x_sata_phy_init()
85 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4); in qcom_ipq806x_sata_phy_init()
90 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4); in qcom_ipq806x_sata_phy_init()
101 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4); in qcom_ipq806x_sata_phy_init()
114 reg = readl_relaxed(phy->mmio + SATA_PHY_P0_PARAM4); in qcom_ipq806x_sata_phy_exit()
/linux/drivers/iommu/arm/arm-smmu/
A Darm-smmu-nvidia.c60 return readl_relaxed(reg); in nvidia_smmu_read_reg()
116 val |= readl_relaxed(reg); in nvidia_smmu_tlb_sync()
143 val = readl_relaxed(reg); in nvidia_smmu_reset()
157 gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst()
161 gfsynr0 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR0); in nvidia_smmu_global_fault_inst()
162 gfsynr1 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR1); in nvidia_smmu_global_fault_inst()
163 gfsynr2 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR2); in nvidia_smmu_global_fault_inst()
202 fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); in nvidia_smmu_context_fault_bank()
206 fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); in nvidia_smmu_context_fault_bank()
208 cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(idx)); in nvidia_smmu_context_fault_bank()
/linux/drivers/soc/dove/
A Dpmu.c55 val = readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
70 val &= readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_assert()
84 val |= readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_deassert()
157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off()
164 val &= readl_relaxed(pmc_base + PMC_SW_RST); in pmu_domain_power_off()
169 val = readl_relaxed(pmu_base + PMU_PWR) | pmu_dom->pwr_mask; in pmu_domain_power_off()
189 val = ~pmu_dom->pwr_mask & readl_relaxed(pmu_base + PMU_PWR); in pmu_domain_power_on()
195 val |= readl_relaxed(pmc_base + PMC_SW_RST); in pmu_domain_power_on()
202 val |= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_on()
232 u32 stat = readl_relaxed(base + PMC_IRQ_CAUSE) & gc->mask_cache; in pmu_irq_handler()
[all …]
/linux/drivers/clk/tegra/
A Dclk-tegra210.c504 value = readl_relaxed(clk_base + PLLE_AUX); in tegra210_plle_hw_sequence_is_enabled()
520 value = readl_relaxed(clk_base + PLLE_MISC0); in tegra210_plle_hw_sequence_start()
527 value = readl_relaxed(clk_base + PLLE_AUX); in tegra210_plle_hw_sequence_start()
570 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_control_enable()
582 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_sequence_start()
1421 val = readl_relaxed(clk_base + reg); in tegra210_wait_for_mask()
2916 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_enable_pllu()
2948 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
2958 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
2980 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()
[all …]
/linux/drivers/soc/bcm/brcmstb/pm/
A Dpm-arm.c153 (void)readl_relaxed(base + AON_CTRL_PM_INITIATE); in do_bsp_initiate_command()
163 (void)readl_relaxed(base + AON_CTRL_PM_INITIATE); in do_bsp_initiate_command()
169 ret = readl_relaxed(base + AON_CTRL_PM_INITIATE); in do_bsp_initiate_command()
190 tmp = readl_relaxed(base + AON_CTRL_HOST_MISC_CMDS); in brcmstb_pm_handshake()
193 (void)readl_relaxed(base + AON_CTRL_HOST_MISC_CMDS); in brcmstb_pm_handshake()
218 tmp = readl_relaxed(ctrl.memcs[i].ddr_shimphy_base + in shimphy_set()
234 tmp = readl_relaxed(ctrl.memcs[i].ddr_ctrl + in ddr_ctrl_set()
290 tmp = readl_relaxed(ctrl.memcs[i].ddr_phy_base + in s5entry_method1()
298 tmp = readl_relaxed(ctrl.memcs[i].ddr_phy_base + in s5entry_method1()
324 (void)readl_relaxed(base + AON_CTRL_PM_CTRL); in brcmstb_do_pmsm_power_down()
[all …]

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