| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_mqd_manager_v9.c | 49 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask() local
56 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); in update_cu_mask()
59 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
65 m->compute_static_thread_mgmt_se6 = se_mask[6]; in update_cu_mask()
66 m->compute_static_thread_mgmt_se7 = se_mask[7]; in update_cu_mask()
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| A D | kfd_mqd_manager.c | 98 uint32_t *se_mask) in mqd_symmetrically_map_cu_mask() argument
159 se_mask[i] = 0; in mqd_symmetrically_map_cu_mask()
167 se_mask[se] |= 1 << (cu + sh * 16); in mqd_symmetrically_map_cu_mask()
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| A D | kfd_mqd_manager_cik.c | 48 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
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| A D | kfd_mqd_manager_v10.c | 48 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
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| A D | kfd_mqd_manager_vi.c | 51 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
58 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask); in update_cu_mask()
61 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
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| A D | kfd_mqd_manager.h | 123 uint32_t *se_mask);
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.c | 333 if (enc110->se_mask->DP_VID_N_MUL) in dce110_stream_encoder_dp_set_stream_attribute()
451 if (enc110->se_mask->DP_DYN_RANGE && enc110->se_mask->DP_YCBCR_RANGE) in dce110_stream_encoder_dp_set_stream_attribute()
624 if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { in dce110_stream_encoder_hdmi_set_stream_attribute()
747 if (enc110->se_mask->HDMI_AVI_INFO_CONT && in dce110_stream_encoder_update_hdmi_info_packets()
748 enc110->se_mask->HDMI_AVI_INFO_SEND) { in dce110_stream_encoder_update_hdmi_info_packets()
782 if (enc110->se_mask->HDMI_AVI_INFO_CONT && in dce110_stream_encoder_update_hdmi_info_packets()
783 enc110->se_mask->HDMI_AVI_INFO_SEND) { in dce110_stream_encoder_update_hdmi_info_packets()
791 if (enc110->se_mask->HDMI_DB_DISABLE) { in dce110_stream_encoder_update_hdmi_info_packets()
901 if (enc110->se_mask->DP_SEC_AVI_ENABLE) { in dce110_stream_encoder_stop_dp_info_packets()
1048 if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) in dce110_reset_hdmi_stream_attribute()
[all …]
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| A D | dce_stream_encoder.h | 701 const struct dce_stream_encoder_mask *se_mask; member
711 const struct dce_stream_encoder_mask *se_mask);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_stream_encoder.c | 44 enc1->se_shift->field_name, enc1->se_mask->field_name
631 const struct dcn10_stream_encoder_mask *se_mask) in dcn20_stream_encoder_construct() argument
639 enc1->se_mask = se_mask; in dcn20_stream_encoder_construct()
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| A D | dcn20_stream_encoder.h | 97 const struct dcn10_stream_encoder_mask *se_mask);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_dio_stream_encoder.c | 44 enc1->se_shift->field_name, enc1->se_mask->field_name
845 const struct dcn10_stream_encoder_mask *se_mask) in dcn30_dio_stream_encoder_construct() argument
855 enc1->se_mask = se_mask; in dcn30_dio_stream_encoder_construct()
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| A D | dcn30_dio_stream_encoder.h | 284 const struct dcn10_stream_encoder_mask *se_mask);
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | gfx_v7_0.c | 1678 unsigned se_mask[4]; in gfx_v7_0_write_harvested_raster_configs() local
1681 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1682 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1683 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1684 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1690 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v7_0_write_harvested_raster_configs()
1691 (!se_mask[2] && !se_mask[3]))) { in gfx_v7_0_write_harvested_raster_configs()
1694 if (!se_mask[0] && !se_mask[1]) { in gfx_v7_0_write_harvested_raster_configs()
1709 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v7_0_write_harvested_raster_configs()
1712 if (!se_mask[idx]) { in gfx_v7_0_write_harvested_raster_configs()
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| A D | gfx_v6_0.c | 1381 unsigned se_mask[4]; in gfx_v6_0_write_harvested_raster_configs() local
1384 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1385 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1386 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1387 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1399 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v6_0_write_harvested_raster_configs()
1402 if (!se_mask[idx]) in gfx_v6_0_write_harvested_raster_configs()
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| A D | gfx_v8_0.c | 3533 unsigned se_mask[4]; in gfx_v8_0_write_harvested_raster_configs() local
3536 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3537 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3538 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3539 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3545 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v8_0_write_harvested_raster_configs()
3546 (!se_mask[2] && !se_mask[3]))) { in gfx_v8_0_write_harvested_raster_configs()
3549 if (!se_mask[0] && !se_mask[1]) { in gfx_v8_0_write_harvested_raster_configs()
3564 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v8_0_write_harvested_raster_configs()
3567 if (!se_mask[idx]) { in gfx_v8_0_write_harvested_raster_configs()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_stream_encoder.c | 45 enc1->se_shift->field_name, enc1->se_mask->field_name
1618 const struct dcn10_stream_encoder_mask *se_mask) in dcn10_stream_encoder_construct() argument
1626 enc1->se_mask = se_mask; in dcn10_stream_encoder_construct()
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| A D | dcn10_stream_encoder.h | 578 const struct dcn10_stream_encoder_mask *se_mask; member
588 const struct dcn10_stream_encoder_mask *se_mask);
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| /linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| A D | dce100_resource.c | 251 static const struct dce_stream_encoder_mask se_mask = { variable
485 &stream_enc_regs[eng_id], &se_shift, &se_mask); in dce100_stream_encoder_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_resource.c | 293 static const struct dce_stream_encoder_mask se_mask = { variable
768 &se_shift, &se_mask); in dce120_stream_encoder_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_resource.c | 360 static const struct dcn10_stream_encoder_mask se_mask = { variable
864 &se_shift, &se_mask); in dcn201_stream_encoder_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| A D | dce112_resource.c | 304 static const struct dce_stream_encoder_mask se_mask = { variable
515 &se_shift, &se_mask); in dce112_stream_encoder_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_resource.c | 264 static const struct dce_stream_encoder_mask se_mask = { variable
603 &se_shift, &se_mask); in dce60_stream_encoder_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_resource.c | 268 static const struct dce_stream_encoder_mask se_mask = { variable
608 &se_shift, &se_mask); in dce80_stream_encoder_create()
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| /linux/drivers/ntb/hw/idt/ |
| A D | ntb_hw_idt.c | 637 u32 part_mask, port_mask, se_mask; in idt_init_link() local
669 se_mask = ~(IDT_SEMSK_LINKUP | IDT_SEMSK_LINKDN | IDT_SEMSK_GSIGNAL); in idt_init_link()
670 idt_sw_write(ndev, IDT_SW_SEMSK, se_mask); in idt_init_link()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_resource.c | 275 static const struct dce_stream_encoder_mask se_mask = { variable
537 &se_shift, &se_mask); in dce110_stream_encoder_create()
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