Searched refs:target_itr (Results 1 – 8 of 8) sorted by relevance
449 itr = rc->target_itr; in iavf_update_itr()473 if (rc->target_itr == IAVF_ITR_ADAPTIVE_MAX_USECS && in iavf_update_itr()474 (q_vector->rx.target_itr & IAVF_ITR_MASK) == in iavf_update_itr()481 rc->target_itr &= ~IAVF_ITR_ADAPTIVE_LATENCY; in iavf_update_itr()493 itr = rc->target_itr + IAVF_ITR_ADAPTIVE_MIN_INC; in iavf_update_itr()599 rc->target_itr = itr; in iavf_update_itr()1646 q_vector->rx.target_itr); in iavf_update_enable_itr()1647 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_update_enable_itr()1656 q_vector->tx.target_itr); in iavf_update_enable_itr()1657 q_vector->tx.current_itr = q_vector->tx.target_itr; in iavf_update_enable_itr()[all …]
420 u16 target_itr; /* target ITR setting for ring(s) */ member
347 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_map_vector_to_rxq()351 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_map_vector_to_rxq()373 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_map_vector_to_txq()376 q_vector->tx.target_itr >> 1); in iavf_map_vector_to_txq()377 q_vector->tx.current_itr = q_vector->tx.target_itr; in iavf_map_vector_to_txq()
788 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_set_itr_per_queue()791 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_set_itr_per_queue()
1196 itr = rc->target_itr; in i40e_update_itr()1220 if (rc->target_itr == I40E_ITR_ADAPTIVE_MAX_USECS && in i40e_update_itr()1221 (q_vector->rx.target_itr & I40E_ITR_MASK) == in i40e_update_itr()1228 rc->target_itr &= ~I40E_ITR_ADAPTIVE_LATENCY; in i40e_update_itr()1240 itr = rc->target_itr + I40E_ITR_ADAPTIVE_MIN_INC; in i40e_update_itr()1346 rc->target_itr = itr; in i40e_update_itr()2650 q_vector->rx.target_itr); in i40e_update_enable_itr()2651 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_update_enable_itr()2660 q_vector->tx.target_itr); in i40e_update_enable_itr()2661 q_vector->tx.current_itr = q_vector->tx.target_itr; in i40e_update_enable_itr()[all …]
433 u16 target_itr; /* target ITR setting for ring(s) */ member
3636 q_vector->rx.target_itr = in i40e_vsi_configure_msix()3639 q_vector->rx.target_itr >> 1); in i40e_vsi_configure_msix()3640 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_vsi_configure_msix()3643 q_vector->tx.target_itr = in i40e_vsi_configure_msix()3646 q_vector->tx.target_itr >> 1); in i40e_vsi_configure_msix()3647 q_vector->tx.current_itr = q_vector->tx.target_itr; in i40e_vsi_configure_msix()3750 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()3751 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1); in i40e_configure_msi_and_legacy()3752 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_configure_msi_and_legacy()3754 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()[all …]
2879 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in i40e_set_itr_per_queue()2882 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in i40e_set_itr_per_queue()
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