Home
last modified time | relevance | path

Searched refs:AXI_DCMPAREACRA0 (Results 1 – 4 of 4) sorted by relevance

/tf-a-ffa_el3_spmc/plat/renesas/common/include/registers/
A Daxi_registers.h34 #define AXI_DCMPAREACRA0 (AXI_BASE + 0x4100U) macro
/tf-a-ffa_el3_spmc/plat/renesas/rzg/
A Dbl2_plat_setup.c216 mmio_write_32(AXI_DCMPAREACRA0 + 0x8U * no, reg); in bl2_lossy_setting()
218 mmio_write_32(AXI_DCMPAREACRA0 + 0x8U * no, reg | enable); in bl2_lossy_setting()
221 info.a0 = mmio_read_32(AXI_DCMPAREACRA0 + 0x8U * no); in bl2_lossy_setting()
229 mmio_read_32(AXI_DCMPAREACRA0 + 0x8U * no), in bl2_lossy_setting()
/tf-a-ffa_el3_spmc/plat/renesas/rcar/
A Dbl2_plat_setup.c221 mmio_write_32(AXI_DCMPAREACRA0 + 0x8 * no, reg); in bl2_lossy_setting()
223 mmio_write_32(AXI_DCMPAREACRA0 + 0x8 * no, reg | enable); in bl2_lossy_setting()
226 info.a0 = mmio_read_32(AXI_DCMPAREACRA0 + 0x8 * no); in bl2_lossy_setting()
234 mmio_read_32(AXI_DCMPAREACRA0 + 0x8 * no), in bl2_lossy_setting()
/tf-a-ffa_el3_spmc/plat/renesas/common/include/
A Drcar_def.h289 #define AXI_DCMPAREACRA0 (0xE6784100U) macro

Completed in 10 milliseconds