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Searched refs:CTLR_ENABLE_G1S_BIT (Results 1 – 4 of 4) sorted by relevance

/tf-a-ffa_el3_spmc/drivers/arm/gic/v3/
A Dgic600_multichip.c48 (CTLR_ENABLE_G0_BIT | CTLR_ENABLE_G1S_BIT | in set_gicd_dchipr_rt_owner()
83 (CTLR_ENABLE_G0_BIT | CTLR_ENABLE_G1S_BIT | in set_gicd_chipr_n()
204 (CTLR_ENABLE_G0_BIT | CTLR_ENABLE_G1S_BIT | in gic600_multichip_init()
A Dgicv3_helpers.c228 ctlr_enable |= CTLR_ENABLE_G1S_BIT; in gicv3_secure_spis_config_props()
340 ctlr_enable |= CTLR_ENABLE_G1S_BIT; in gicv3_secure_ppi_sgi_config_props()
A Dgicv3_main.c203 CTLR_ENABLE_G1S_BIT | in gicv3_distif_init()
836 CTLR_ENABLE_G1S_BIT | in gicv3_distif_init_restore()
/tf-a-ffa_el3_spmc/include/drivers/arm/
A Dgicv3.h129 #define CTLR_ENABLE_G1S_BIT BIT_32(CTLR_ENABLE_G1S_SHIFT) macro

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