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/tf-a-ffa_el3_spmc/plat/arm/board/sgi575/fdts/
A Dsgi575_stmm_config.dts63 * arg0 : Buffer base which is shared between EL3 and S-EL0.
86 * System registers region for access from S-EL0.
110 * SPM Payload memory. Mapped as code region for S-EL0
122 * Memory shared between EL3 and S-EL0.
134 * Memory shared between Normal world and S-EL0.
/tf-a-ffa_el3_spmc/services/std_svc/spm/spmc/
A Dspmc_pm.c52 if (sp-> runtime_el == EL0) in spmc_cpu_on_finish_handler()
119 if (sp-> runtime_el == EL0) in spmc_cpu_off_handler()
A Dspmc_setup.c37 return (sp->runtime_el == EL0) ? sel0_sp_ec_index : plat_my_core_pos(); in get_ec_index()
204 if (sp->runtime_el == EL0) in spmc_sp_common_setup()
A Dspmc.h55 EL0 = 0, enumerator
A Dspmc_main.c244 execution_ctx_count = (sp_desc[index].runtime_el == EL0) ? 1: PLATFORM_CORE_COUNT; in partition_info_get_handler()
794 if (sp->runtime_el == EL0) { in ffa_sec_ep_register_handler()
1006 if (sp->runtime_el == EL0) { in sp_manifest_parse()
1140 if (sp->runtime_el != EL0 && sp->runtime_el != EL1) { in find_and_prepare_sp_context()
1415 if (sp->runtime_el == EL0) { in spmc_sp_interrupt_handler()
/tf-a-ffa_el3_spmc/docs/components/
A Dsecure-partition-manager-mm.rst51 S-EL0 that can be used to implement simple management and security services.
52 Since S-EL0 is an unprivileged Exception Level, a Secure Partition relies on
67 services in EL3 and instantiate the rest in a partition in S-EL0.
240 S-EL0, the SPM should define the following types of interfaces:
242 - Interfaces that enable access to privileged operations from S-EL0. These
284 instruction (ERET) to S-EL0. Later, the Secure Partition issues an SVC
403 architectural setup to enable execution in S-EL0
429 S-EL0 or S-EL1.
460 - ``CurrentEL=0`` (EL0)
647 Request the permission attributes of a memory region from S-EL0.
[all …]
A Dxlat-tables-lib-v2-design.rst75 a User region (EL0) or Privileged region (EL1). See the ``MT_xxx`` definitions
77 Never attribute is set simultaneously for both EL1 and EL0.
A Dsecure-partition-manager.rst69 - SPM based on the MM interface to communicate with an S-EL0 partition `[2]`_.
375 S-EL0.
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-6.rst131 translation regime, for example between EL0 and EL1, therefore this variant
135 Secure-EL0 applications.
A Dsecurity-advisory-tfv-3.rst61 in the Secure EL1&0 regime. As a result, this programs the Secure EL0 execution
/tf-a-ffa_el3_spmc/docs/design/
A Dinterrupt-framework-design.rst21 knowledge of software executing in Secure-EL1/Secure-EL0. The choice of
127 the state of software in Secure-EL1/Secure-EL0 before handing the
147 Secure-EL1/Secure-EL0. This is a valid routing model as secure software
148 in Secure-EL1/Secure-EL0 is in control of how its execution is preempted
157 Secure-EL1/Secure-EL0. This is a valid routing model as secure software
196 Secure-EL0, both the EL3 and the non secure interrupt types map to the FIQ
199 route the FIQ signal to EL3 when executing in Secure-EL1/Secure-EL0, thereby
276 Secure Payload (SP) software which runs in Secure-EL1/Secure-EL0 and is
289 to a Secure OS which runs in Secure-EL1/Secure-EL0. It interfaces with the
455 purpose, SP_EL1/Secure-EL0, LR, VFP and system registers. It can use
[all …]
A Dfirmware-design.rst212 SYS_LED[2:1] - Exception Level (EL3=0x3, EL2=0x2, EL1=0x1, EL0=0x0)
371 for subsequent stages of TF-A and normal world software. EL1 and EL0 are given
1073 On a production system that includes a Trusted OS running in Secure-EL1/EL0,
2636 (at EL0 and S-EL0) if it is only supported at EL0. If instead it is
/tf-a-ffa_el3_spmc/docs/about/
A Dfeatures.rst63 Secure-EL0, which can be used to implement simple management and
/tf-a-ffa_el3_spmc/docs/threat_model/
A Dthreat_model.rst120 | | world, including NS-EL0 NS-EL1 and NS-EL2 levels |
123 | | world, including S-EL0 and S-EL1 levels |
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dporting-guide.rst2604 - The S-EL1 interrupts are signaled as IRQ in S-EL0/1 context and as FIQ in
2605 NS-EL0/1/2 context.
2606 - The Non secure interrupts are signaled as FIQ in S-EL0/1 context and as IRQ
2607 in the NS-EL0/1/2 context.
2608 - The EL3 interrupts are signaled as FIQ in both S-EL0/1 and NS-EL0/1/2
A Dbuild-options.rst392 level (or in EL1 if the current exception level is EL0).
740 lower ELs (EL1 and EL0) in EL3 so that ``AT`` speculative fetch at any point
/tf-a-ffa_el3_spmc/docs/
A Dchange-log.rst408 - Allow access to nor2 flash and system registers from S-EL0
1774 support it at EL0.
2957 environment instantiated in S-EL0 that can be used to implement simple
3384 such as the one shared by EL1 and EL0.
3386 The library does not support initializing translation tables for EL0

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