IGRPEN1_EL1_ENABLE_G0_BIT (reference) in projects: tf-a-ffa_el3_spmc

Searched refs:IGRPEN1_EL1_ENABLE_G0_BIT (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/include/drivers/arm/
A D	gicv3.h	`251 #define IGRPEN1_EL1_ENABLE_G0_BIT BIT_32(IGRPEN1_EL1_ENABLE_G0_SHIFT) macro`
/tf-a-ffa_el3_spmc/drivers/arm/gic/v3/
A D	gicv3_main.c	`329 write_icc_igrpen0_el1(IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_enable() 359 ~IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_disable()`

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