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Searched refs:MTK_PWR_LVL1 (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/mediatek/mt8173/
A Dplat_pm.c33 #define MTK_PWR_LVL1 1 macro
38 #define MTK_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL1]
39 #define MTK_SYSTEM_PWR_STATE(state) ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) ?\
58 MTK_LOCAL_STATE_OFF, MTK_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
59 #if PLAT_MAX_PWR_LVL > MTK_PWR_LVL1
342 spm_mcdi_prepare_for_off_state(mpidr, MTK_PWR_LVL1); in plat_power_domain_suspend()
378 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) && in plat_power_domain_on_finish()
387 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) && in plat_power_domain_on_finish()
428 spm_mcdi_finish_for_on_state(mpidr, MTK_PWR_LVL1); in plat_power_domain_suspend_finish()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/
A Dplat_pm.c77 #define MTK_PWR_LVL1 1 macro
82 #define MTK_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL1]
83 #define MTK_SYSTEM_PWR_STATE(state) ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) ? \
102 MTK_LOCAL_STATE_OFF, MTK_PWR_LVL1, PSTATE_TYPE_POWERDOWN),
103 #if PLAT_MAX_PWR_LVL > MTK_PWR_LVL1

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