Searched refs:SPM_PWR_STATUS (Results 1 – 10 of 10) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/mediatek/mt8173/drivers/mtcmos/ |
| A D | mtcmos.c | 149 while ((mmio_read_32(SPM_PWR_STATUS) & bit_cpu) || in mtcmos_ctrl_little_off()
169 pwr_sta = (mmio_read_32(SPM_PWR_STATUS) >> spm_pwr_sta) & 1; in wait_mtcmos_ack()
185 mmio_read_32(SPM_PWR_STATUS), in wait_mtcmos_ack()
267 power_ctrl, on, mmio_read_32(SPM_PWR_STATUS), ret); in mtcmos_non_cpu_ctrl()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spm/ |
| A D | mt_spm_cond.c | 25 #define SPM_PWR_STATUS MT_LP_TZ_SPM_REG(0x016C) macro
81 IDLE_CG(0xffffffff, SPM_PWR_STATUS, false, 0U),
155 (((mmio_read_32(SPM_PWR_STATUS) & mask) == 0U) && \
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spm/ |
| A D | mt_spm_cond.c | 29 #define SPM_PWR_STATUS MT_LP_TZ_SPM_REG(0x016C) macro
90 IDLE_CG(0xffffffff, SPM_PWR_STATUS, false, 0U),
171 (((mmio_read_32(SPM_PWR_STATUS) & mask) == 0U) && \
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spmc/ |
| A D | mtspmc_private.h | 42 #define SPM_PWR_STATUS SPM_REG(0x16c) macro
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spmc/ |
| A D | mtspmc_private.h | 42 #define SPM_PWR_STATUS SPM_REG(0x16c) macro
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/spmc/ |
| A D | mtspmc_private.h | 29 #define SPM_PWR_STATUS (SPM_BASE + 0x180) macro
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| A D | mtspmc.c | 129 return mmio_read_32(SPM_PWR_STATUS) & mask; in spm_get_powerstate()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt6795/include/ |
| A D | spm.h | 65 #define SPM_PWR_STATUS (SPM_BASE + 0x60c) macro
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8173/drivers/spm/ |
| A D | spm_mcdi.c | 412 pwr_status = mmio_read_32(SPM_PWR_STATUS) | in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
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| A D | spm.h | 64 #define SPM_PWR_STATUS (SPM_BASE + 0x60c) macro
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