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Searched refs:SPM_REGWR_CFG_KEY (Results 1 – 12 of 12) sorted by relevance

/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/spm/
A Dspm.c225 mmio_clrsetbits_32(PCM_CON1, PCM_TIMER_EN_LSB, SPM_REGWR_CFG_KEY); in spm_disable_pcm_timer()
234 mmio_setbits_32(PCM_CON1, SPM_REGWR_CFG_KEY | PCM_TIMER_EN_LSB); in spm_set_wakeup_event()
257 SPM_REGWR_CFG_KEY); in spm_set_pcm_wdt()
263 mmio_setbits_32(PCM_CON1, SPM_REGWR_CFG_KEY | PCM_WDT_EN_LSB); in spm_set_pcm_wdt()
266 SPM_REGWR_CFG_KEY); in spm_set_pcm_wdt()
A Dspm_pmic_wrap.c130 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | in mt_spm_pmic_wrap_set_phase()
152 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | in mt_spm_pmic_wrap_set_cmd()
A Dspm.h2250 #define SPM_REGWR_CFG_KEY (SPM_PROJECT_CODE << 16) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_internal.c308 mmio_clrsetbits_32(PCM_CON1, RG_PCM_TIMER_EN_LSB, SPM_REGWR_CFG_KEY); in __spm_disable_pcm_timer()
317 SPM_REGWR_CFG_KEY | SPM_EVENT_COUNTER_CLR_LSB); in __spm_set_wakeup_event()
329 mmio_setbits_32(PCM_CON1, SPM_REGWR_CFG_KEY | RG_PCM_TIMER_EN_LSB); in __spm_set_wakeup_event()
345 SPM_REGWR_CFG_KEY); in __spm_set_wakeup_event()
477 SPM_REGWR_CFG_KEY); in __spm_set_pcm_wdt()
481 SPM_REGWR_CFG_KEY); in __spm_set_pcm_wdt()
490 SPM_REGWR_CFG_KEY | RG_PCM_WDT_EN_LSB); in __spm_set_pcm_wdt()
A Dmt_spm_pmic_wrap.c117 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); in mt_spm_pmic_wrap_set_phase()
140 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); in mt_spm_pmic_wrap_set_cmd()
A Dmt_spm_reg.h2858 #define SPM_REGWR_CFG_KEY (SPM_PROJECT_CODE << 16) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_internal.c349 mmio_clrsetbits_32(PCM_CON1, RG_PCM_TIMER_EN_LSB, SPM_REGWR_CFG_KEY); in __spm_disable_pcm_timer()
358 SPM_REGWR_CFG_KEY | SPM_EVENT_COUNTER_CLR_LSB); in __spm_set_wakeup_event()
370 mmio_setbits_32(PCM_CON1, SPM_REGWR_CFG_KEY | RG_PCM_TIMER_EN_LSB); in __spm_set_wakeup_event()
390 SPM_REGWR_CFG_KEY); in __spm_set_wakeup_event()
522 SPM_REGWR_CFG_KEY); in __spm_set_pcm_wdt()
526 SPM_REGWR_CFG_KEY); in __spm_set_pcm_wdt()
535 SPM_REGWR_CFG_KEY | RG_PCM_WDT_EN_LSB); in __spm_set_pcm_wdt()
A Dmt_spm_pmic_wrap.c117 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); in mt_spm_pmic_wrap_set_phase()
140 mmio_write_32(POWERON_CONFIG_EN, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); in mt_spm_pmic_wrap_set_cmd()
A Dmt_spm_reg.h2918 #define SPM_REGWR_CFG_KEY (SPM_PROJECT_CODE << 16) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/include/
A Dspm.h112 #define SPM_REGWR_CFG_KEY (SPM_PROJECT_CODE << 16) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8173/drivers/spm/
A Dspm.h114 #define SPM_REGWR_CFG_KEY (SPM_PROJECT_CODE << 16) macro
A Dspm.c96 mmio_write_32(SPM_POWERON_CONFIG_SET, SPM_REGWR_CFG_KEY | SPM_REGWR_EN); in spm_register_init()

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