Searched refs:TXDCLK_2X_SEL (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/drivers/marvell/comphy/
A D	phy-comphy-3700.h	107 #define TXDCLK_2X_SEL BIT(6) macro
A D	phy-comphy-3700.c	816 MISC_REG0_DEFAULT_VALUE | CLK500M_EN | TXDCLK_2X_SEL | CLK100M_125M_EN, in mvebu_a3700_comphy_pcie_power_on()
/tf-a-ffa_el3_spmc/docs/
A D	change-log.rst	307 - Set TXDCLK_2X_SEL bit during PCIe initialization

Completed in 10 milliseconds

Last Index update Fri Sep 05 17:56:23 CST 2025