Searched refs:bl1_tzram_layout (Results 1 – 8 of 8) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/qemu/common/ |
| A D | qemu_bl1_setup.c | 18 static meminfo_t bl1_tzram_layout; variable
23 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
35 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
36 bl1_tzram_layout.total_size = BL_RAM_SIZE; in bl1_early_platform_setup()
52 QEMU_CONFIGURE_BL1_MMU(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
53 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/layerscape/common/ |
| A D | ls_bl1_setup.c | 14 static meminfo_t bl1_tzram_layout; variable
18 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
38 bl1_tzram_layout.total_base = LS_SRAM_BASE; in ls_bl1_early_platform_setup()
39 bl1_tzram_layout.total_size = LS_SRAM_SIZE; in ls_bl1_early_platform_setup()
50 ls_setup_page_tables(bl1_tzram_layout.total_base, in ls_bl1_plat_arch_setup()
51 bl1_tzram_layout.total_size, in ls_bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/rpi/rpi3/ |
| A D | rpi3_bl1_setup.c | 20 static meminfo_t bl1_tzram_layout; variable
24 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
41 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
42 bl1_tzram_layout.total_size = BL_RAM_SIZE; in bl1_early_platform_setup()
52 rpi3_setup_page_tables(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
53 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/ |
| A D | bl1_plat_setup.c | 29 static meminfo_t bl1_tzram_layout; variable
76 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
77 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
85 plat_configure_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
86 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey/ |
| A D | hikey_bl1_setup.c | 28 static meminfo_t bl1_tzram_layout; variable
40 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
53 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
54 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
67 hikey_init_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
68 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/arm/common/ |
| A D | arm_bl1_setup.c | 30 bl1_tzram_layout.total_base, \
31 bl1_tzram_layout.total_size, \
55 static meminfo_t bl1_tzram_layout; variable
62 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
80 bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl1_early_platform_setup()
81 bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE; in arm_bl1_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/arm/board/fvp/ |
| A D | fvp_bl1_setup.c | 96 meminfo_t *bl1_tzram_layout; in bl1_plat_handle_post_image_load() local
115 bl1_tzram_layout = bl1_plat_sec_mem_layout(); in bl1_plat_handle_post_image_load()
124 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load()
126 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/ |
| A D | hikey960_bl1_setup.c | 43 static meminfo_t bl1_tzram_layout; variable
66 return &bl1_tzram_layout; in bl1_plat_sec_mem_layout()
87 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
88 bl1_tzram_layout.total_size = BL1_RW_SIZE; in bl1_early_platform_setup()
101 hikey960_init_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
102 bl1_tzram_layout.total_size, in bl1_plat_arch_setup()
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