| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 374 cpu_context_t *ctx; in cm_init_context_by_index()
386 cpu_context_t *ctx; in cm_init_my_context()
621 cpu_context_t *ctx; in cm_el2_sysregs_context_save()
643 cpu_context_t *ctx; in cm_el2_sysregs_context_restore()
660 cpu_context_t *ctx; in cm_el1_sysregs_context_save()
677 cpu_context_t *ctx; in cm_el1_sysregs_context_restore()
698 cpu_context_t *ctx; in cm_set_elr_el3()
716 cpu_context_t *ctx; in cm_set_elr_spsr_el3()
737 cpu_context_t *ctx; in cm_write_scr_el3_bit()
767 cpu_context_t *ctx; in cm_get_scr_el3()
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/aarch32/ |
| A D | context.h | 55 } cpu_context_t; typedef
58 #define get_regs_ctx(h) (&((cpu_context_t *) h)->regs_ctx)
65 CASSERT(CTX_REGS_OFFSET == __builtin_offsetof(cpu_context_t, regs_ctx), \
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/aarch64/ |
| A D | context.h | 426 } cpu_context_t; typedef
429 #define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
431 # define get_fpregs_ctx(h) (&((cpu_context_t *) h)->fpregs_ctx)
433 #define get_el1_sysregs_ctx(h) (&((cpu_context_t *) h)->el1_sysregs_ctx)
435 # define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
437 #define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
438 #define get_cve_2018_3639_ctx(h) (&((cpu_context_t *) h)->cve_2018_3639_ctx)
440 # define get_pauth_ctx(h) (&((cpu_context_t *) h)->pauth_ctx)
448 CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx), \
457 CASSERT(CTX_FPREGS_OFFSET == __builtin_offsetof(cpu_context_t, fpregs_ctx), \
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| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch32/ |
| A D | context_mgmt.c | 54 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context()
150 cpu_context_t *ctx; in cm_init_context_by_index()
162 cpu_context_t *ctx; in cm_init_my_context()
178 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit()
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| /tf-a-ffa_el3_spmc/bl1/aarch32/ |
| A D | bl1_context_mgmt.c | 22 static cpu_context_t bl1_cpu_context[2];
96 sizeof(cpu_context_t)); in flush_smc_and_cpu_ctx()
147 cpu_context_t *ctx = cm_get_context(security_state); in bl1_prepare_next_image()
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| /tf-a-ffa_el3_spmc/include/lib/extensions/ |
| A D | sve.h | 12 void sve_enable(cpu_context_t *context);
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| A D | amu.h | 85 void amu_enable(bool el2_unused, cpu_context_t *ctx);
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| /tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/ |
| A D | tegra_fiq_glue.c | 42 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_interrupt_handler()
129 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_get_intr_context()
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| /tf-a-ffa_el3_spmc/lib/extensions/sve/ |
| A D | sve.c | 28 void sve_enable(cpu_context_t *context) in sve_enable()
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| /tf-a-ffa_el3_spmc/plat/arm/common/aarch64/ |
| A D | execution_state_switch.c | 45 cpu_context_t *ctx = (cpu_context_t *) handle; in arm_execution_state_switch()
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| /tf-a-ffa_el3_spmc/bl32/sp_min/ |
| A D | sp_min_main.c | 128 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_prepare_next_image_entry()
211 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_warm_boot()
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| /tf-a-ffa_el3_spmc/services/std_svc/spm/spmc/ |
| A D | spmc_setup.c | 43 cpu_context_t *ctx; in spmc_el0_sp_setup()
192 cpu_context_t *cpu_ctx; in spmc_sp_common_setup()
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| A D | spmc.h | 92 cpu_context_t cpu_ctx;
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| /tf-a-ffa_el3_spmc/services/std_svc/sdei/ |
| A D | sdei_intr_mgmt.c | 222 static cpu_context_t *restore_and_resume_ns_context(void) in restore_and_resume_ns_context()
224 cpu_context_t *ns_ctx; in restore_and_resume_ns_context()
311 cpu_context_t *ctx, jmp_buf *dispatch_jmp) in setup_ns_dispatch()
409 cpu_context_t *ctx; in sdei_intr_handler()
594 cpu_context_t *ns_ctx; in sdei_dispatch_event()
673 cpu_context_t *ctx; in sdei_event_complete()
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| /tf-a-ffa_el3_spmc/services/std_svc/spmd/ |
| A D | spmd_private.h | 52 cpu_context_t cpu_ctx;
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| /tf-a-ffa_el3_spmc/bl1/aarch64/ |
| A D | bl1_context_mgmt.c | 44 static cpu_context_t bl1_cpu_context[2]; in bl1_prepare_next_image()
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| /tf-a-ffa_el3_spmc/services/spd/tlkd/ |
| A D | tlkd_private.h | 105 cpu_context_t cpu_ctx;
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| A D | tlkd_main.c | 61 cpu_context_t *s_cpu_context; in tlkd_interrupt_handler()
207 cpu_context_t *ns_cpu_context; in tlkd_smc_handler()
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/ |
| A D | context_mgmt.h | 35 void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep);
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| /tf-a-ffa_el3_spmc/services/std_svc/spm/spm_mm/ |
| A D | spm_mm_setup.c | 29 cpu_context_t *ctx = &(sp_ctx->cpu_ctx); in spm_el0_sp_setup()
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| A D | spm_mm_main.c | 63 cpu_context_t *cpu_ctx; in spm_mm_setup()
235 cpu_context_t *cpu_ctx = &(sp_ptr->cpu_ctx); in spm_mm_sp_call()
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| /tf-a-ffa_el3_spmc/docs/getting_started/ |
| A D | psci-lib-integration-guide.rst | 39 #. Get the non-secure ``cpu_context_t`` for the current CPU by calling
80 ``cpu_context_t`` data structure. The initialization of other non-secure CPU
90 use the same ``cpu_context_t`` data structure for PSCI CPU context management
95 ``cpu_context_t`` is stripped down for just PSCI CPU context management.
104 Runtime Software. Using ``cpu_context_t`` as an intermediary data store
109 information) for exit into non-secure world. Using ``cpu_context_t`` as an
117 to CPU context ``cpu_context_t`` data and these are described in
149 returns the values to be programmed to these registers via ``cpu_context_t``.
151 can use the proposed values provided in the ``cpu_context_t``, modifying the
221 returns, the EL3 Runtime Software must retrieve the ``cpu_context_t`` (using
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| /tf-a-ffa_el3_spmc/services/spd/opteed/ |
| A D | opteed_private.h | 131 cpu_context_t cpu_ctx;
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| /tf-a-ffa_el3_spmc/services/spd/tspd/ |
| A D | tspd_private.h | 187 cpu_context_t cpu_ctx;
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| /tf-a-ffa_el3_spmc/include/services/ |
| A D | spm_mm_svc.h | 114 cpu_context_t cpu_ctx;
|