Searched refs:hi (Results 1 – 10 of 10) sorted by relevance
| /tf-a-ffa_el3_spmc/drivers/arm/cci/ |
| A D | cci.c | 17 #define MAKE_CCI_PART_NUMBER(hi, lo) (((hi) << 8) | (lo)) argument
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| /tf-a-ffa_el3_spmc/docs/components/ |
| A D | arm-sip-service.rst | 49 uint32_t PC hi
51 uint32_t Cookie hi
60 The parameters *PC hi* and *PC lo* defines upper and lower words, respectively,
62 Execution State has been switched. When calling from AArch64, *PC hi* must be 0.
65 switched, the parameters *Cookie hi* and *Cookie lo* are passed in CPU registers
66 0 and 1, respectively. When calling from AArch64, *Cookie hi* must be 0.
88 and 1 populated with the supplied *Cookie hi* and *Cookie lo* values,
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| /tf-a-ffa_el3_spmc/lib/cpus/aarch64/ |
| A D | denver.S | 168 b.hi 1f
188 b.hi 2f
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| A D | cortex_a53.S | 200 b.hi errata_not_applies
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| A D | cpu_helpers.S | 68 csel x2, x2, x0, hi
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| /tf-a-ffa_el3_spmc/plat/mediatek/common/drivers/uart/ |
| A D | 8250_console.S | 46 b.hi 1f
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| /tf-a-ffa_el3_spmc/lib/aarch64/ |
| A D | cache_helpers.S | 143 b.hi loop1
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| A D | misc_helpers.S | 250 b.hi .Lzeromem_dczva_fallback_entry
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| /tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| A D | ari.c | 81 uint32_t lo, uint32_t hi) in ari_request_wait() argument
89 ari_write_32(ari_base, hi, ARI_REQUEST_DATA_HI); in ari_request_wait()
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| /tf-a-ffa_el3_spmc/plat/nxp/common/aarch64/ |
| A D | bl31_data.S | 334 b.hi 1b
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