Home
last modified time | relevance | path

Searched refs:shared (Results 1 – 25 of 34) sorted by relevance

12

/tf-a-ffa_el3_spmc/services/std_svc/sdei/
A Dsdei_event.c58 sdei_ev_map_t *find_event_map_by_intr(unsigned int intr_num, bool shared) in find_event_map_by_intr() argument
69 mapping = shared ? SDEI_SHARED_MAPPING() : SDEI_PRIVATE_MAPPING(); in find_event_map_by_intr()
A Dsdei_private.h233 sdei_ev_map_t *find_event_map_by_intr(unsigned int intr_num, bool shared);
/tf-a-ffa_el3_spmc/plat/arm/board/sgm775/fdts/
A Dsgm775_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/css/sgm/fdts/
A Dsgm_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/juno/fdts/
A Djuno_tb_fw_config.dts18 * In case of having shared Mbed TLS heap between BL1 and BL2,
20 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/rde1edge/fdts/
A Drde1edge_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/rdn1edge/fdts/
A Drdn1edge_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/rdn2/fdts/
A Drdn2_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/rdv1/fdts/
A Drdv1_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/rdv1mc/fdts/
A Drdv1mc_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/plat/arm/board/sgi575/fdts/
A Dsgi575_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
A Dsgi575_stmm_config.dts63 * arg0 : Buffer base which is shared between EL3 and S-EL0.
122 * Memory shared between EL3 and S-EL0.
134 * Memory shared between Normal world and S-EL0.
/tf-a-ffa_el3_spmc/plat/arm/board/tc/fdts/
A Dtc_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/tf-a-ffa_el3_spmc/docs/components/
A Ddebugfs-design.rst82 shared buffer is used to pass path string parameters, or e.g. to exchange
92 - Special care is taken with the shared buffer to avoid TOCTOU attacks.
97 - In order to setup the shared buffer, the component consuming the interface
99 - In order to map the shared buffer, BL31 requires enabling the dynamic xlat
101 - Data exchange is limited by the shared buffer length. A large read operation
A Darm-sip-service.rst97 String parameters are passed through a shared buffer using a specific union:
272 On success, the read data is retrieved from the shared buffer after the
376 Initial call to setup the shared exchange buffer. Notice if successful once,
387 uint64_t Physical address of the shared buffer.
A Dsdei.rst60 private events, and another for shared events. The SDEI dispatcher provides
89 to the private and shared event descriptor arrays, respectively. Note that the
98 shared array.
106 - Statically bound shared and private interrupts must be bound to shared and
166 /* Dynamic shared events */
A Dsecure-partition-manager-mm.rst199 buffer shared with the Secure Partition.
211 through a shared memory region. The location of data in the shared memory area
212 is passed as a parameter to the ``MM_COMMUNICATE`` SMC. The shared memory area
216 exchange data with a partition only if it has been populated in this shared
217 memory area. The shared memory area is implemented as per the guidelines
221 The format of data structures used to encapsulate data in the shared memory is
224 describes that the communication buffer shared between the Non-secure world and
243 operations typically require access to system resources that are either shared
490 - ``X0``: Virtual address of a buffer shared between EL3 and S-EL0. The
559 Address of a buffer shared between the SPM and Secure Partition to pass
/tf-a-ffa_el3_spmc/plat/arm/board/fvp/fdts/
A Dfvp_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
A Dfvp_fw_config.dts29 * non shared SRAM. The runtime checks ensure we don't
/tf-a-ffa_el3_spmc/plat/rockchip/rk3288/
A Dplatform.mk27 -I${RK_PLAT_SOC}/include/shared/ \
/tf-a-ffa_el3_spmc/docs/plat/
A Dnvidia-tegra.rst26 Instruction and 64 KB Data Level 1 caches; and have a 2MB shared Level 2
28 Data Level 1 caches; and also have a 2 MB shared Level 2 unified cache. A
64 48 KB Instruction and 32 KB Data Level 1 caches; and have a 2 MB shared
66 and 32 KB Data Level 1 caches; and have a 512 KB shared Level 2 unified cache.
A Drz-g2.rst76 Once BL2 boots, it determines the boot reason, writes it to shared
82 behind using direct shared memory access to BOOT_KIND_BASE _and_
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/
A Dplatform.mk25 -I${RK_PLAT_SOC}/include/shared/ \
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/m0/
A DMakefile27 -I../../include/shared/
/tf-a-ffa_el3_spmc/docs/design/
A Dreset-design.rst59 shared amongst CPUs. This is done by nominating one of the CPUs as the primary,
60 which is responsible for initialising shared hardware and coordinating the boot

Completed in 30 milliseconds

12