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Searched refs:AIPS2_BASE_ADDR (Results 1 – 7 of 7) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h17 #define AIPS2_BASE_ADDR 0x83F00000 macro
27 #define AIPS2_BASE_ADDR 0x63F00000 macro
97 #define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000)
98 #define CSU_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000)
99 #define ARM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000)
104 #define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B4000)
115 #define NFC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DB000)
116 #define EMI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DBF00)
118 #define ATA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000)
119 #define SIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E4000)
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/u-boot/arch/arm/include/asm/arch-mx35/
A Dimx-regs.h51 #define AIPS2_BASE_ADDR 0x53F00000 macro
52 #define AIPS2_CTRL_BASE_ADDR AIPS2_BASE_ADDR
A Dlowlevel_macro.S27 ldr r2, =AIPS2_BASE_ADDR
/u-boot/arch/arm/mach-imx/
A Dinit.c18 aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; in init_aips()
/u-boot/arch/arm/mach-imx/mx5/
A Dlowlevel_init.S66 ldr r0, =AIPS2_BASE_ADDR
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h135 #define AIPS2_BASE_ADDR AIPS2_ON_BASE_ADDR macro
/u-boot/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h202 #define AIPS2_BASE_ADDR AIPS2_ON_BASE_ADDR macro

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