/u-boot/board/gateworks/venice/ |
A D | lpddr4_timing.c | 1951 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg_1gb), 1958 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg_1gb), 1965 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg_1gb), 1972 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg_1gb), 1979 .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg_1gb), 1987 .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), 2467 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg_4gb), 2474 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg_4gb), 2481 .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg_4gb), 2495 .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg_4gb), [all …]
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/u-boot/drivers/video/ |
A D | scf0403_lcd.c | 104 {{0x3A, pixfmt_params_sn04, ARRAY_SIZE(pixfmt_params_sn04)}, 0}, 106 {{0xC5, vcom_params_sn04, ARRAY_SIZE(vcom_params_sn04)}, 0}, 107 {{0xE0, pgamma_params_sn04, ARRAY_SIZE(pgamma_params_sn04)}, 0}, 115 {{0xff, extcmd_params_sn20, ARRAY_SIZE(extcmd_params_sn20)}, 0}, 117 {{0xbc, bc_params_sn20, ARRAY_SIZE(bc_params_sn20)}, 0}, 118 {{0xbd, bd_params_sn20, ARRAY_SIZE(bd_params_sn20)}, 0}, 119 {{0xbe, be_params_sn20, ARRAY_SIZE(be_params_sn20)}, 0}, 120 {{0xc7, vcom_params_sn20, ARRAY_SIZE(vcom_params_sn20)}, 0}, 121 {{0xed, vmesur_params_sn20, ARRAY_SIZE(vmesur_params_sn20)}, 0}, 274 priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn04); in scf0403_init() [all …]
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A D | ld9040.c | 91 ARRAY_SIZE(SEQ_USER_SETTING)); in ld9040_cfg_ldo() 93 ARRAY_SIZE(SEQ_PANEL_CONDITION)); in ld9040_cfg_ldo() 94 ld9040_spi_write(SEQ_DISPCTL, ARRAY_SIZE(SEQ_DISPCTL)); in ld9040_cfg_ldo() 95 ld9040_spi_write(SEQ_MANPWR, ARRAY_SIZE(SEQ_MANPWR)); in ld9040_cfg_ldo() 96 ld9040_spi_write(SEQ_PWR_CTRL, ARRAY_SIZE(SEQ_PWR_CTRL)); in ld9040_cfg_ldo() 97 ld9040_spi_write(SEQ_ELVSS_ON, ARRAY_SIZE(SEQ_ELVSS_ON)); in ld9040_cfg_ldo() 98 ld9040_spi_write(SEQ_GTCON, ARRAY_SIZE(SEQ_GTCON)); in ld9040_cfg_ldo() 99 ld9040_spi_write(SEQ_GAMMA_SET1, ARRAY_SIZE(SEQ_GAMMA_SET1)); in ld9040_cfg_ldo() 101 ld9040_spi_write(SEQ_SLPOUT, ARRAY_SIZE(SEQ_SLPOUT)); in ld9040_cfg_ldo() 109 ld9040_spi_write(SEQ_DISPON, ARRAY_SIZE(SEQ_DISPON)); in ld9040_enable_ldo() [all …]
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A D | s6e8ax0.c | 38 ARRAY_SIZE(data_to_send_reverse)); in s6e8ax0_panel_cond() 41 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_panel_cond() 53 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_display_cond() 67 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_gamma_cond() 78 ARRAY_SIZE(data_to_send)); in s6e8ax0_gamma_update() 89 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_etc_source_control() 134 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_etc_power_control() 145 ARRAY_SIZE(data_to_send)); in s6e8ax0_etc_mipi_control3() 156 data_to_send, ARRAY_SIZE(data_to_send)); in s6e8ax0_etc_mipi_control4() 178 ARRAY_SIZE(data_to_send)); in s6e8ax0_display_on() [all …]
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/u-boot/board/freescale/imx8mn_evk/ |
A D | ddr4_timing.c | 1175 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1182 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1189 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1196 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1203 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1205 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1207 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1209 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1211 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/beacon/imx8mn/ |
A D | lpddr4_timing.c | 1395 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1402 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1409 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1416 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1423 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1425 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1427 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1429 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1431 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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A D | lpddr4_2g_timing.c | 1402 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1409 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1416 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1423 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1430 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1432 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1434 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1436 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1438 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/phytec/phycore_imx8mm/ |
A D | lpddr4_timing.c | 1808 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1815 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1822 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1829 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1836 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1838 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1840 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1842 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1844 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/phytec/phycore_imx8mp/ |
A D | lpddr4_timing.c | 1811 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1818 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1825 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1832 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1839 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1841 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1843 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1845 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1847 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/freescale/imx8mp_evk/ |
A D | lpddr4_timing.c | 1810 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1817 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1824 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1831 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1838 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1840 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1842 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1844 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1846 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/toradex/verdin-imx8mm/ |
A D | lpddr4_timing.c | 1812 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1819 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1826 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), 1833 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1840 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1842 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1844 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1846 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1848 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/google/imx8mq_phanbell/ |
A D | lpddr4_timing_1g.c | 1700 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1707 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1714 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1721 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1723 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1725 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1727 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1729 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/technexion/pico-imx8mq/ |
A D | lpddr4_timing_1gb.c | 1702 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1709 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1716 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1723 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1725 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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A D | lpddr4_timing_2gb.c | 1702 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1709 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1716 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1723 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1725 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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A D | lpddr4_timing_3gb.c | 1702 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1709 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1716 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1723 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1725 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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A D | lpddr4_timing_4gb.c | 1702 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), 1709 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), 1716 .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), 1723 .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), 1725 .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), 1727 .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), 1729 .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), 1731 .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
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/u-boot/board/renesas/silk/ |
A D | silk_spl.c | 157 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 161 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 165 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 168 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 189 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 196 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 315 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in spl_init_dbsc() 320 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) in spl_init_dbsc() 328 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in spl_init_dbsc() 333 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in spl_init_dbsc() [all …]
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/u-boot/board/renesas/lager/ |
A D | lager_spl.c | 143 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 146 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 149 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 152 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 173 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 180 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 291 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in spl_init_dbsc() 296 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in spl_init_dbsc() 301 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in spl_init_dbsc() 306 for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++) in spl_init_dbsc() [all …]
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/u-boot/board/renesas/gose/ |
A D | gose_spl.c | 151 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 154 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 157 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 160 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 181 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 188 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 300 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in spl_init_dbsc() 305 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) in spl_init_dbsc() 308 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in spl_init_dbsc() 313 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in spl_init_dbsc() [all …]
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/u-boot/board/renesas/alt/ |
A D | alt_spl.c | 157 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 160 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 163 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 166 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 187 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 194 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 306 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) in spl_init_dbsc() 311 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) in spl_init_dbsc() 314 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) in spl_init_dbsc() 319 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) in spl_init_dbsc() [all …]
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/u-boot/board/cei/cei-tk1-som/ |
A D | cei-tk1-som.c | 24 ARRAY_SIZE(cei_tk1_som_gpio_inits)); in pinmux_init() 27 ARRAY_SIZE(cei_tk1_som_pingrps)); in pinmux_init() 30 ARRAY_SIZE(cei_tk1_som_drvgrps)); in pinmux_init() 33 ARRAY_SIZE(cei_tk1_som_mipipadctrlgrps)); in pinmux_init()
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/u-boot/board/gdsys/common/ |
A D | phy.c | 199 verify_88e1518, ARRAY_SIZE(verify_88e1518)); in setup_88e1518() 204 fixup_88e1518, ARRAY_SIZE(fixup_88e1518)); in setup_88e1518() 209 default_88e1518, ARRAY_SIZE(default_88e1518)); in setup_88e1518() 215 ch1fix_88e1518, ARRAY_SIZE(ch1fix_88e1518)); in setup_88e1518() 221 swreset_88e1518, ARRAY_SIZE(swreset_88e1518)); in setup_88e1518() 233 verify_88e1518, ARRAY_SIZE(verify_88e1518)); in setup_88e1514() 238 fixup_88e1518, ARRAY_SIZE(fixup_88e1518)); in setup_88e1514() 244 ARRAY_SIZE(mii_to_copper_88e1514)); in setup_88e1514() 250 ARRAY_SIZE(sgmii_autoneg_off_88e1518)); in setup_88e1514() 256 ARRAY_SIZE(invert_led2_88e1514)); in setup_88e1514() [all …]
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/u-boot/board/renesas/porter/ |
A D | porter_spl.c | 155 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 158 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 161 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 164 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 185 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 192 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 351 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) { in spl_init_dbsc() 358 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) { in spl_init_dbsc() 381 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) { in spl_init_dbsc() 388 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) { in spl_init_dbsc() [all …]
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/u-boot/board/renesas/stout/ |
A D | stout_spl.c | 146 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 149 for (i = 0; i < ARRAY_SIZE(gpio_offs); i++) in spl_init_gpio() 152 for (i = 0; i < ARRAY_SIZE(gpio_set); i++) in spl_init_gpio() 155 for (i = 0; i < ARRAY_SIZE(gpio_clr); i++) in spl_init_gpio() 176 for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { in spl_init_lbsc() 183 for (i = 0; i < ARRAY_SIZE(lbsc_offs); i++) in spl_init_lbsc() 337 for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) { in spl_init_dbsc() 344 for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) { in spl_init_dbsc() 367 for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) { in spl_init_dbsc() 374 for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) { in spl_init_dbsc() [all …]
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/u-boot/drivers/clk/imx/ |
A D | clk-imxrt1050.c | 124 pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); in imxrt1050_clk_probe() 153 ARRAY_SIZE(pll1_bypass_sels), in imxrt1050_clk_probe() 158 ARRAY_SIZE(pll2_bypass_sels), in imxrt1050_clk_probe() 163 ARRAY_SIZE(pll3_bypass_sels), in imxrt1050_clk_probe() 168 ARRAY_SIZE(pll5_bypass_sels), in imxrt1050_clk_probe() 208 periph_sels, ARRAY_SIZE(periph_sels))); in imxrt1050_clk_probe() 211 usdhc_sels, ARRAY_SIZE(usdhc_sels))); in imxrt1050_clk_probe() 214 usdhc_sels, ARRAY_SIZE(usdhc_sels))); in imxrt1050_clk_probe() 217 lpuart_sels, ARRAY_SIZE(lpuart_sels))); in imxrt1050_clk_probe() 223 semc_sels, ARRAY_SIZE(semc_sels))); in imxrt1050_clk_probe() [all …]
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