Searched refs:AT91_PMC_PLL_CTRL1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/at91/
A D	clk-sam9x60-pll.c	114 pmc_read(base, AT91_PMC_PLL_CTRL1, &val); in sam9x60_frac_pll_set_rate() 124 pmc_write(base, AT91_PMC_PLL_CTRL1, in sam9x60_frac_pll_set_rate() 152 pmc_read(base, AT91_PMC_PLL_CTRL1, &val); in sam9x60_frac_pll_get_rate() 172 pmc_read(base, AT91_PMC_PLL_CTRL1, &val); in sam9x60_frac_pll_enable()
/u-boot/include/linux/clk/
A D	at91_pmc.h	41 #define AT91_PMC_PLL_CTRL1 0x10 /* PLL Control Register 1 [for SAM9X60] */ macro

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