CONFIG_DDR_CLK_FREQ (reference) in projects: u-boot

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Searched refs:CONFIG_DDR_CLK_FREQ (Results 1 – 25 of 41) sorted by relevance

/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A D	fsl_lsch3_speed.c	`81 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info() 82 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info() 84 sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ; in get_sys_info()`
A D	fsl_lsch2_speed.c	`64 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info() 65 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()`
/u-boot/arch/arm/cpu/armv7/ls102xa/
A D	clock.c	`45 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info() 46 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()`
/u-boot/include/configs/
A D	ls1028ardb.h	`12 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	ls1028aqds.h	`12 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	kontron_sl28.h	`58 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	ls1046afrwy.h	`12 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	ls1021atsn.h	`25 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	lx2160a_common.h	`170 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro`
A D	ls1021aiot.h	`23 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	controlcenterd.h	`48 #define CONFIG_DDR_CLK_FREQ 66666600 macro`
A D	ls1021aqds.h	`33 #define CONFIG_DDR_CLK_FREQ 100000000 macro 37 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro`
A D	ls1046ardb.h	`13 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	ls1088aqds.h	`26 #define CONFIG_DDR_CLK_FREQ 100000000 macro 33 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro`
A D	ls1021atwr.h	`26 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	xpedite550x.h	`55 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ macro`
A D	xpedite537x.h	`56 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ macro`
A D	ls1088ardb.h	`20 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
A D	ls1043ardb.h	`12 #define CONFIG_DDR_CLK_FREQ 100000000 macro`
/u-boot/board/freescale/t4rdb/
A D	spl.c	`40 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()`
/u-boot/board/freescale/t208xrdb/
A D	spl.c	`34 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()`
A D	t208xrdb.c	`103 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()`
/u-boot/board/freescale/t104xrdb/
A D	spl.c	`35 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()`
/u-boot/arch/powerpc/cpu/mpc85xx/
A D	speed.c	`107 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info() 108 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info() 542 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info() 547 sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ; in get_sys_info()`
/u-boot/board/freescale/t102xrdb/
A D	spl.c	`35 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()`

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