| /u-boot/arch/x86/include/asm/ |
| A D | cache.h | 13 #ifndef CONFIG_SYS_CACHELINE_SIZE
14 #define CONFIG_SYS_CACHELINE_SIZE 64 macro
17 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/arm/cpu/pxa/ |
| A D | cache.c | 27 start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); in invalidate_dcache_range()
28 stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); in invalidate_dcache_range()
32 start += CONFIG_SYS_CACHELINE_SIZE; in invalidate_dcache_range()
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| /u-boot/drivers/bootcount/ |
| A D | bootcount.c | 18 CONFIG_SYS_CACHELINE_SIZE); in bootcount_store()
25 CONFIG_SYS_CACHELINE_SIZE); in bootcount_store()
31 CONFIG_SYS_CACHELINE_SIZE); in bootcount_store()
97 CONFIG_SYS_CACHELINE_SIZE); in bootcount_mem_set()
103 CONFIG_SYS_CACHELINE_SIZE); in bootcount_mem_set()
108 CONFIG_SYS_CACHELINE_SIZE); in bootcount_mem_set()
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| /u-boot/arch/powerpc/lib/ |
| A D | cache.c | 17 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); in flush_cache()
21 addr += CONFIG_SYS_CACHELINE_SIZE) { in flush_cache()
29 addr += CONFIG_SYS_CACHELINE_SIZE) { in flush_cache()
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| /u-boot/arch/microblaze/include/asm/ |
| A D | cache.h | 15 #ifdef CONFIG_SYS_CACHELINE_SIZE
16 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/riscv/include/asm/ |
| A D | cache.h | 18 #ifdef CONFIG_SYS_CACHELINE_SIZE
19 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/arm/cpu/arm926ejs/ |
| A D | cache.c | 35 start += CONFIG_SYS_CACHELINE_SIZE; in invalidate_dcache_range()
46 start += CONFIG_SYS_CACHELINE_SIZE; in flush_dcache_range()
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| /u-boot/arch/nds32/include/asm/ |
| A D | cache.h | 57 #ifdef CONFIG_SYS_CACHELINE_SIZE
58 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/arm/cpu/arm11/ |
| A D | cpu.c | 76 start += CONFIG_SYS_CACHELINE_SIZE; in invalidate_dcache_range()
87 start += CONFIG_SYS_CACHELINE_SIZE; in flush_dcache_range()
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| /u-boot/arch/arm/mach-imx/imx8/ |
| A D | parse-container.c | 32 img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1), in authenticate_image()
33 ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1); in authenticate_image()
37 image_index, img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1), err); in authenticate_image()
170 ALIGN(length, CONFIG_SYS_CACHELINE_SIZE)); in read_auth_container()
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| /u-boot/arch/mips/mach-jz47xx/ |
| A D | start.S | 71 addiu t0, t0, CONFIG_SYS_CACHELINE_SIZE
78 addiu t0, t0, CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/sandbox/include/asm/ |
| A D | cache.h | 22 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN macro
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| /u-boot/arch/powerpc/include/asm/ |
| A D | cache.h | 31 #ifndef CONFIG_SYS_CACHELINE_SIZE
32 #define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES macro
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| /u-boot/arch/mips/include/asm/ |
| A D | cache.h | 19 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN macro
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| /u-boot/include/configs/ |
| A D | sipeed-maix.h | 15 #define CONFIG_SYS_CACHELINE_SIZE 64 macro
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| A D | rk3368_common.h | 11 #define CONFIG_SYS_CACHELINE_SIZE 64 macro
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| A D | rk3188_common.h | 9 #define CONFIG_SYS_CACHELINE_SIZE 64 macro
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| A D | sec_entry_cpu1.S | 84 mov r1, #CONFIG_SYS_CACHELINE_SIZE
113 .balign CONFIG_SYS_CACHELINE_SIZE
114 .rept CONFIG_SYS_CACHELINE_SIZE/4
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| /u-boot/arch/m68k/include/asm/ |
| A D | cache.h | 197 #ifdef CONFIG_SYS_CACHELINE_SIZE
198 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/drivers/ddr/altera/ |
| A D | sdram_soc64.c | 114 if (addr % CONFIG_SYS_CACHELINE_SIZE) { in sdram_clear_mem()
120 if (size % CONFIG_SYS_CACHELINE_SIZE) { in sdram_clear_mem()
127 for (i = 0; i < size; i = i + CONFIG_SYS_CACHELINE_SIZE) { in sdram_clear_mem()
132 addr += CONFIG_SYS_CACHELINE_SIZE; in sdram_clear_mem()
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| /u-boot/arch/arm/lib/ |
| A D | cache.c | 58 if (start & (CONFIG_SYS_CACHELINE_SIZE - 1)) in check_cache_range()
61 if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1)) in check_cache_range()
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| /u-boot/arch/arc/include/asm/ |
| A D | cache.h | 20 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN macro
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| /u-boot/arch/arm/include/asm/ |
| A D | cache.h | 50 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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| /u-boot/arch/mips/mach-mtmips/ |
| A D | ddr_cal.c | 24 #define TEST_PAT_SIZE (NUM_OF_CACHELINE * CONFIG_SYS_CACHELINE_SIZE)
59 for (i = 0; i < TEST_PAT_SIZE; i += CONFIG_SYS_CACHELINE_SIZE) in dqs_test_error()
63 for (i = 0; i < TEST_PAT_SIZE; i += CONFIG_SYS_CACHELINE_SIZE) in dqs_test_error()
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| /u-boot/drivers/usb/dwc3/ |
| A D | io.h | 23 #define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
|