| /u-boot/board/varisys/cyrus/ |
| A D | law.c | 20 #ifdef CONFIG_SYS_DCSRBAR_PHYS
22 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 98 #ifdef CONFIG_SYS_DCSRBAR_PHYS
99 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/t208xqds/ |
| A D | law.c | 24 #ifdef CONFIG_SYS_DCSRBAR_PHYS
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 114 #ifdef CONFIG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/t208xrdb/ |
| A D | law.c | 24 #ifdef CONFIG_SYS_DCSRBAR_PHYS
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 114 #ifdef CONFIG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/t4rdb/ |
| A D | law.c | 21 #ifdef CONFIG_SYS_DCSRBAR_PHYS
23 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 96 #ifdef CONFIG_SYS_DCSRBAR_PHYS
97 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/t102xrdb/ |
| A D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 86 #ifdef CONFIG_SYS_DCSRBAR_PHYS
87 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/t104xrdb/ |
| A D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 99 #ifdef CONFIG_SYS_DCSRBAR_PHYS
100 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/freescale/common/p_corenet/ |
| A D | law.c | 27 #ifdef CONFIG_SYS_DCSRBAR_PHYS
29 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 133 #ifdef CONFIG_SYS_DCSRBAR_PHYS
134 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/keymile/kmp204x/ |
| A D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
25 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 92 #ifdef CONFIG_SYS_DCSRBAR_PHYS
93 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/board/keymile/kmcent2/ |
| A D | law.c | 15 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| A D | tlb.c | 74 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| A D | fsl_corenet_serdes.c | 267 #ifndef CONFIG_SYS_DCSRBAR_PHYS
268 #define CONFIG_SYS_DCSRBAR_PHYS 0x80000000 /* Must be 1GB-aligned for rev1.0 */ macro
318 struct law_entry law = find_law(CONFIG_SYS_DCSRBAR_PHYS); in enable_bank()
321 law_index = set_next_law(CONFIG_SYS_DCSRBAR_PHYS, in enable_bank()
324 set_law(law.index, CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_1M, in enable_bank()
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| /u-boot/include/configs/ |
| A D | t4qds.h | 55 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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| A D | kmp204x.h | 79 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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| A D | cyrus.h | 87 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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| A D | P2041RDB.h | 87 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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| A D | corenet_ds.h | 100 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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| A D | kmcent2.h | 172 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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