Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_DDR_TIMING_3 (Results 1 – 25 of 38) sorted by relevance

12

/u-boot/include/configs/km/
A Dkm-mpc8360.h67 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A Dkm-mpc832x.h69 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A Dkm-mpc8309.h120 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
/u-boot/board/mpc8308_p1m/
A Dsdram.c45 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
/u-boot/board/freescale/mpc8308rdb/
A Dsdram.c49 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
/u-boot/board/gdsys/mpc8308/
A Dsdram.c52 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
/u-boot/board/freescale/mpc8315erdb/
A Dsdram.c67 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
/u-boot/board/freescale/mpc8313erdb/
A Dsdram.c76 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
/u-boot/board/freescale/mpc832xemds/
A Dmpc832xemds.c143 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
/u-boot/include/configs/
A Dmpc8308_p1m.h66 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A Dve8313.h51 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8323ERDB.h68 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8308RDB.h62 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC832XEMDS.h66 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A Dids8313.h60 #define CONFIG_SYS_DDR_TIMING_3 (1 << 16) /* ext refrec */ macro
A DMPC8349EMDS.h80 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8313ERDB_NOR.h72 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8313ERDB_NAND.h101 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8349EMDS_SDRAM.h80 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC8315ERDB.h57 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC837XEMDS.h68 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
A DMPC837XERDB.h84 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 macro
/u-boot/board/Arcturus/ucp1020/
A Dddr.c91 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3, in fixed_sdram()
/u-boot/board/freescale/mpc8323erdb/
A Dmpc8323erdb.c124 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
/u-boot/board/sbc8641d/
A Dsbc8641d.c113 ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()

Completed in 26 milliseconds

12