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Searched refs:CONFIG_SYS_FSL_DRAM_BASE1 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dcpu.h20 #define CONFIG_SYS_FSL_DRAM_BASE1 0x80000000 macro
80 #define CONFIG_SYS_FSL_DRAM_BASE1 0x80000000 macro
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dcpu.c119 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
178 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
208 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
353 { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
536 case CONFIG_SYS_FSL_DRAM_BASE1: in final_mmu_setup()
/u-boot/scripts/
A Dconfig_whitelist.txt2310 CONFIG_SYS_FSL_DRAM_BASE1

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