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Searched refs:CONFIG_SYS_PCIE1_MEM_VIRT (Results 1 – 25 of 34) sorted by relevance

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/u-boot/board/varisys/cyrus/
A Dtlb.c59 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
64 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/u-boot/board/freescale/t4rdb/
A Dtlb.c55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
65 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/u-boot/board/freescale/common/p_corenet/
A Dtlb.c94 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
99 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000,
104 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000,
/u-boot/board/gdsys/p1022/
A Dtlb.c52 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000,
/u-boot/board/freescale/p1010rdb/
A Dtlb.c55 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/Arcturus/ucp1020/
A Dtlb.c52 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/include/configs/
A Dsbc8641d.h255 #define CONFIG_SYS_PCIE1_MEM_VIRT CONFIG_SYS_PCIE1_MEM_BUS macro
339 #define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
A Dt4qds.h143 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A Dcontrolcenterd.h202 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 macro
A DMPC8568MDS.h235 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 macro
A Dsbc8548.h414 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 macro
A DMPC8548CDS.h340 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 macro
A Dkmp204x.h253 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A Dcyrus.h230 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A DP2041RDB.h335 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A DUCP1020.h350 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A Dcorenet_ds.h344 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
A Dkmcent2.h397 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 macro
/u-boot/board/keymile/kmp204x/
A Dtlb.c50 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/keymile/kmcent2/
A Dtlb.c49 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dtlb.c48 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/freescale/t102xrdb/
A Dtlb.c57 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/freescale/t104xrdb/
A Dtlb.c70 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/freescale/t208xqds/
A Dtlb.c69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
/u-boot/board/freescale/t208xrdb/
A Dtlb.c69 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,

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