Searched refs:CPLL_MODE_SHIFT (Results 1 – 10 of 10) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cru_rk3128.h | 99 CPLL_MODE_SHIFT = 8, enumerator
100 CPLL_MODE_MASK = 1 << CPLL_MODE_SHIFT,
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| A D | cru_rk322x.h | 93 CPLL_MODE_SHIFT = 8, enumerator
94 CPLL_MODE_MASK = 1 << CPLL_MODE_SHIFT,
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| A D | cru_rk3288.h | 191 CPLL_MODE_SHIFT = 8, enumerator
192 CPLL_MODE_MASK = CRU_MODE_MASK << CPLL_MODE_SHIFT,
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| A D | cru_rk3188.h | 157 CPLL_MODE_SHIFT = 8, enumerator
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| A D | cru_px30.h | 155 CPLL_MODE_SHIFT = 2, enumerator
156 CPLL_MODE_MASK = 3 << CPLL_MODE_SHIFT,
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3188.c | 238 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
385 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
387 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rkclk_init()
455 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
457 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rkclk_init()
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| A D | clk_rk3128.c | 232 CPLL_MODE_NORM << CPLL_MODE_SHIFT); in rkclk_init()
250 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
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| A D | clk_rk3288.c | 438 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rkclk_init()
499 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rkclk_init()
552 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
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| A D | clk_rk3328.c | 79 CPLL_MODE_SHIFT = 8, enumerator
230 mode_shift = CPLL_MODE_SHIFT; in rkclk_set_pll()
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| A D | clk_px30.c | 84 APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
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Completed in 21 milliseconds