Searched refs:DDRC_ECCCFG1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ddr/imx/imx8m/
A D	ddr_init.c	33 reg32setbit(DDRC_ECCCFG1(0), 0x4); in ddrc_inline_ecc_scrub()
/u-boot/arch/arm/include/asm/arch-imx8m/
A D	ddr.h	380 #define DDRC_ECCCFG1(X) (DDRC_IPS_BASE_ADDR(X) + 0x74) macro

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