DDR_CTL_CONFIG_GE1_SRAM_SYNC_LSB (reference) in projects: u-boot

Searched refs:DDR_CTL_CONFIG_GE1_SRAM_SYNC_LSB (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A D	ddr.c	`26 #define DDR_CTL_CONFIG_GE1_SRAM_SYNC_LSB 19 macro 29 (((x) << DDR_CTL_CONFIG_GE1_SRAM_SYNC_LSB) & DDR_CTL_CONFIG_GE1_SRAM_SYNC_MASK)`

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